diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 20 | ||||
| -rw-r--r-- | test/CodeGen/X86/x86_64-mul-by-const.ll | 9 |
2 files changed, 29 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index be5a5bc1a5..522ebee73c 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3171,6 +3171,26 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { DAG.getConstant(c1 + c2, N1.getValueType())); } + // fold (srl (trunc (srl x, c1)), c2) -> 0 or (trunc (srl x, (add c1, c2))) + // This is only valid if the OpSizeInBits + c1 = size of inner shift + if (N1C && N0.getOpcode() == ISD::TRUNCATE && + N0.getOperand(0).getOpcode() == ISD::SRL && + N0.getOperand(0)->getOperand(1).getOpcode() == ISD::Constant) { + uint64_t c1 = + cast<ConstantSDNode>(N0.getOperand(0)->getOperand(1))->getZExtValue(); + uint64_t c2 = N1C->getZExtValue(); + EVT InnerShiftVT = N0.getOperand(0)->getOperand(1).getValueType(); + uint64_t InnerShiftSize = InnerShiftVT.getScalarType().getSizeInBits(); + if (c1 + OpSizeInBits == InnerShiftSize) { + if (c1 + c2 >= InnerShiftSize) + return DAG.getConstant(0, VT); + return DAG.getNode(ISD::TRUNCATE, N0->getDebugLoc(), VT, + DAG.getNode(ISD::SRL, N0->getDebugLoc(), InnerShiftVT, + N0.getOperand(0)->getOperand(0), + DAG.getConstant(c1 + c2, InnerShiftVT))); + } + } + // fold (srl (shl x, c), c) -> (and x, cst2) if (N1C && N0.getOpcode() == ISD::SHL && N0.getOperand(1) == N1 && N0.getValueSizeInBits() <= 64) { diff --git a/test/CodeGen/X86/x86_64-mul-by-const.ll b/test/CodeGen/X86/x86_64-mul-by-const.ll new file mode 100644 index 0000000000..9cda9ab192 --- /dev/null +++ b/test/CodeGen/X86/x86_64-mul-by-const.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; Formerly there were two shifts. 8771012. + +define i32 @f9188_mul365384439_shift27(i32 %A) nounwind { +; CHECK: imulq $365384439, +; CHECK: shrq $59, %rax + %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] + ret i32 %tmp1 +} |