diff options
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 11 | ||||
| -rw-r--r-- | test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll | 16 | ||||
| -rw-r--r-- | test/CodeGen/Mips/inlineasm_constraint.ll | 6 |
3 files changed, 33 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 97332cf00d..d056f542e7 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -3041,6 +3041,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight( break; case 'I': // signed 16 bit immediate case 'J': // integer zero + case 'K': // unsigned 16 bit immediate if (isa<ConstantInt>(CallOperandVal)) weight = CW_Constant; break; @@ -3113,6 +3114,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, } } return; + case 'K': // unsigned 16 bit immediate + if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { + EVT Type = Op.getValueType(); + uint64_t Val = (uint64_t)C->getZExtValue(); + if (isUInt<16>(Val)) { + Result = DAG.getTargetConstant(Val, Type); + break; + } + } + return; } if (Result.getNode()) { diff --git a/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll new file mode 100644 index 0000000000..3baf437324 --- /dev/null +++ b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll @@ -0,0 +1,16 @@ +; +;This is a negative test. The constant value given for the constraint (K) +;is greater than 16 bits (0x00100000). +; +; RUN: not llc -march=mipsel < %s 2> %t +; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s + +define i32 @main() nounwind { +entry: + +;CHECK-ERRORS: error: invalid operand for inline asm constraint 'K' + + tail call i32 asm "addu $0,$1,$2", "=r,r,K"(i32 1024, i32 1048576) nounwind + ret i32 0 +} + diff --git a/test/CodeGen/Mips/inlineasm_constraint.ll b/test/CodeGen/Mips/inlineasm_constraint.ll index f053e0e276..04bd513a68 100644 --- a/test/CodeGen/Mips/inlineasm_constraint.ll +++ b/test/CodeGen/Mips/inlineasm_constraint.ll @@ -21,6 +21,12 @@ entry: ; CHECK: #NO_APP tail call i32 asm sideeffect "addi $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind +; Now K with 64 +; CHECK: #APP +; CHECK: addu ${{[0-9]+}},${{[0-9]+}},64 +; CHECK: #NO_APP + tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind + ret i32 0 } |