diff options
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/X86/vec_ss_load_fold.ll | 1 |
2 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 79711dfff3..b6e86bdce7 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -1345,9 +1345,8 @@ bool X86DAGToDAGISel::SelectScalarSSELoadXXX(SDNode *Root, PatternNodeWithChain = N.getOperand(0); if (ISD::isNON_EXTLoad(PatternNodeWithChain.getNode()) && PatternNodeWithChain.hasOneUse() && - IsProfitableToFold(N.getOperand(0), PatternNodeWithChain.getNode(), - Root) && - IsLegalToFold(N.getOperand(0), PatternNodeWithChain.getNode(), Root)) { + IsProfitableToFold(N.getOperand(0), N.getNode(), Root) && + IsLegalToFold(N.getOperand(0), N.getNode(), Root)) { LoadSDNode *LD = cast<LoadSDNode>(PatternNodeWithChain); if (!SelectAddr(Root, LD->getBasePtr(), Base, Scale, Index, Disp,Segment)) return false; diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll index 27a27df08a..c8b2927b71 100644 --- a/test/CodeGen/X86/vec_ss_load_fold.ll +++ b/test/CodeGen/X86/vec_ss_load_fold.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -march=x86 -mattr=+sse,+sse2,+sse41 | FileCheck %s -; XFAIL: * target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8.7.2" |