diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 10 |
2 files changed, 0 insertions, 13 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index b7dbd03fc3..09fd657fff 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -343,9 +343,6 @@ bool FastISel::SelectCall(User *I) { if (MDNode *Dbg = DI->getMetadata("dbg")) MMI->setVariableDbgInfo(DI->getVariable(), FI, Dbg); } - // Building the map above is target independent. Generating DEBUG_VALUE - // inline is target dependent; do this now. - (void)TargetSelectInstruction(cast<Instruction>(I)); return true; } case Intrinsic::eh_exception: { diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 94dec7ce35..d5ad61b266 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -1153,16 +1153,6 @@ bool X86FastISel::X86VisitIntrinsicCall(IntrinsicInst &I) { // FIXME: Handle more intrinsics. switch (I.getIntrinsicID()) { default: return false; - case Intrinsic::dbg_declare: { - DbgDeclareInst *DI = cast<DbgDeclareInst>(&I); - X86AddressMode AM; - if (!X86SelectAddress(DI->getAddress(), AM)) - return false; - const TargetInstrDesc &II = TII.get(TargetInstrInfo::DEBUG_VALUE); - addFullAddress(BuildMI(MBB, DL, II), AM).addImm(0). - addMetadata(DI->getVariable()); - return true; - } case Intrinsic::trap: { BuildMI(MBB, DL, TII.get(X86::TRAP)); return true; |