2 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/X86/vec_ctbits.ll b/test/CodeGen/X86/vec_ctbits.ll
index bad8b2221e..f057c9a39a 100644
--- a/test/CodeGen/X86/vec_ctbits.ll
+++ b/test/CodeGen/X86/vec_ctbits.ll
@@ -4,15 +4,15 @@ declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
 declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
 
-define <2 x i64> @footz(<2 x i64> %a) {
+define <2 x i64> @footz(<2 x i64> %a) nounwind {
   %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
   ret <2 x i64> %c
 }
-define <2 x i64> @foolz(<2 x i64> %a) {
+define <2 x i64> @foolz(<2 x i64> %a) nounwind {
   %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
   ret <2 x i64> %c
 }
-define <2 x i64> @foopop(<2 x i64> %a) {
+define <2 x i64> @foopop(<2 x i64> %a) nounwind {
   %c = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %a)
   ret <2 x i64> %c
 }
diff --git a/test/CodeGen/X86/vec_insert-2.ll b/test/CodeGen/X86/vec_insert-2.ll
index 369ac6cc94..ab902939d5 100644
--- a/test/CodeGen/X86/vec_insert-2.ll
+++ b/test/CodeGen/X86/vec_insert-2.ll
@@ -5,22 +5,22 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movhpd | count 1
 ; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep unpcklpd | count 1
 
-define <4 x float> @t1(float %s, <4 x float> %tmp) {
+define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind {
         %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3
         ret <4 x float> %tmp1
 }
 
-define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) {
+define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind {
         %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 3
         ret <4 x i32> %tmp1
 }
 
-define <2 x double> @t3(double %s, <2 x double> %tmp) {
+define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind {
         %tmp1 = insertelement <2 x double> %tmp, double %s, i32 1
         ret <2 x double> %tmp1
 }
 
-define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) {
+define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) nounwind {
         %tmp1 = insertelement <8 x i16> %tmp, i16 %s, i32 5
         ret <8 x i16> %tmp1
 }