diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 78dbaa64a3..27e0afd34b 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -83,6 +83,35 @@ namespace { /// represented as an indexed [r+r] operation. bool SelectAddrIdxOnly(SDOperand N, SDOperand &Base, SDOperand &Index); + /// SelectInlineAsmMemoryOperand - Implement addressing mode selection for + /// inline asm expressions. + virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op, + char ConstraintCode, + std::vector<SDOperand> &OutOps, + SelectionDAG &DAG) { + SDOperand Op0, Op1; + switch (ConstraintCode) { + default: return true; + case 'm': // memory + if (!SelectAddrIdx(Op, Op0, Op1)) + SelectAddrImm(Op, Op0, Op1); + break; + case 'o': // offsetable + if (!SelectAddrImm(Op, Op0, Op1)) { + Select(Op0, Op); // r+0. + Op1 = getI32Imm(0); + } + break; + case 'v': // not offsetable + SelectAddrIdxOnly(Op, Op0, Op1); + break; + } + + OutOps.push_back(Op0); + OutOps.push_back(Op1); + return false; + } + SDOperand BuildSDIVSequence(SDNode *N); SDOperand BuildUDIVSequence(SDNode *N); |