diff options
| -rw-r--r-- | lib/Transforms/Scalar/InstructionCombining.cpp | 28 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/compare-signs.ll | 28 |
2 files changed, 56 insertions, 0 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index efda6608e4..14a482dd6e 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -8539,6 +8539,34 @@ Instruction *InstCombiner::transformZExtICmp(ICmpInst *ICI, Instruction &CI, } } + // icmp ne A, B is equal to xor A, B when A and B only really have one bit. + // It is also profitable to transform icmp eq into not(xor(A, B)) because that + // may lead to additional simplifications. + if (CI.getType() == ICI->getOperand(0)->getType()) { + if (const IntegerType *ITy = dyn_cast<IntegerType>(CI.getType())) { + Value *LHS = ICI->getOperand(0); + Value *RHS = ICI->getOperand(1); + + uint32_t BitWidth = ITy->getBitWidth(); + APInt KnownZeroLHS(BitWidth, 0), KnownOneLHS(BitWidth, 0); + APInt KnownZeroRHS(BitWidth, 0), KnownOneRHS(BitWidth, 0); + APInt TypeMask(APInt::getAllOnesValue(BitWidth)); + ComputeMaskedBits(LHS, TypeMask, KnownZeroLHS, KnownOneLHS); + ComputeMaskedBits(RHS, TypeMask, KnownZeroRHS, KnownOneRHS); + + if (KnownZeroLHS.countLeadingOnes() == BitWidth-1 && + KnownZeroRHS.countLeadingOnes() == BitWidth-1) { + if (!DoXform) return ICI; + + Value *Xor = Builder->CreateXor(LHS, RHS); + if (ICI->isTrueWhenEqual()) + Xor = Builder->CreateXor(Xor, ConstantInt::get(ITy, 1)); + Xor->takeName(ICI); + return ReplaceInstUsesWith(CI, Xor); + } + } + } + return 0; } diff --git a/test/Transforms/InstCombine/compare-signs.ll b/test/Transforms/InstCombine/compare-signs.ll new file mode 100644 index 0000000000..991020a067 --- /dev/null +++ b/test/Transforms/InstCombine/compare-signs.ll @@ -0,0 +1,28 @@ +; RUN: opt %S -instcombine -S | FileCheck %S +; PR5438 + +; TODO: This should also optimize down. +;define i32 @bar(i32 %a, i32 %b) nounwind readnone { +;entry: +; %0 = icmp sgt i32 %a, -1 ; <i1> [#uses=1] +; %1 = icmp slt i32 %b, 0 ; <i1> [#uses=1] +; %2 = xor i1 %1, %0 ; <i1> [#uses=1] +; %3 = zext i1 %2 to i32 ; <i32> [#uses=1] +; ret i32 %3 +;} + +define i32 @qaz(i32 %a, i32 %b) nounwind readnone { +; CHECK: @qaz +entry: +; CHECK: xor i32 %a, %b +; CHECK; lshr i32 %0, 31 +; CHECK: xor i32 %1, 1 + %0 = lshr i32 %a, 31 ; <i32> [#uses=1] + %1 = lshr i32 %b, 31 ; <i32> [#uses=1] + %2 = icmp eq i32 %0, %1 ; <i1> [#uses=1] + %3 = zext i1 %2 to i32 ; <i32> [#uses=1] + ret i32 %3 +; CHECK-NOT: icmp +; CHECK-NOT: zext +; CHECK: ret i32 %2 +} |