diff options
| -rw-r--r-- | lib/Target/R600/R600EmitClauseMarkers.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/R600/R600InstrInfo.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/R600/R600InstrInfo.h | 1 | ||||
| -rw-r--r-- | lib/Target/R600/R600MachineScheduler.cpp | 2 |
4 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/R600/R600EmitClauseMarkers.cpp b/lib/Target/R600/R600EmitClauseMarkers.cpp index bda3703af7..06cf8ac6c4 100644 --- a/lib/Target/R600/R600EmitClauseMarkers.cpp +++ b/lib/Target/R600/R600EmitClauseMarkers.cpp @@ -201,7 +201,7 @@ private: !SubstituteKCacheBank(I, KCacheBanks)) break; AluInstCount += OccupiedDwords(I); - if (AluInstCount > 124) + if (AluInstCount > TII->getMaxAlusPerClause()) break; } unsigned Opcode = PushBeforeModifier ? diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp index 08650980fd..b232188a26 100644 --- a/lib/Target/R600/R600InstrInfo.cpp +++ b/lib/Target/R600/R600InstrInfo.cpp @@ -645,6 +645,9 @@ const TargetRegisterClass *R600InstrInfo::getSuperIndirectRegClass() const { return &AMDGPU::IndirectRegRegClass; } +unsigned R600InstrInfo::getMaxAlusPerClause() const { + return 115; +} MachineInstrBuilder R600InstrInfo::buildDefaultInstruction(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/R600/R600InstrInfo.h index bf9569e659..dbae90013d 100644 --- a/lib/Target/R600/R600InstrInfo.h +++ b/lib/Target/R600/R600InstrInfo.h @@ -145,6 +145,7 @@ namespace llvm { virtual const TargetRegisterClass *getSuperIndirectRegClass() const; + unsigned getMaxAlusPerClause() const; ///buildDefaultInstruction - This function returns a MachineInstr with /// all the instruction modifiers initialized to their default values. diff --git a/lib/Target/R600/R600MachineScheduler.cpp b/lib/Target/R600/R600MachineScheduler.cpp index 9074364bb3..a777142a9e 100644 --- a/lib/Target/R600/R600MachineScheduler.cpp +++ b/lib/Target/R600/R600MachineScheduler.cpp @@ -37,7 +37,7 @@ void R600SchedStrategy::initialize(ScheduleDAGMI *dag) { CurInstKind = IDOther; CurEmitted = 0; OccupedSlotsMask = 15; - InstKindLimit[IDAlu] = 120; // 120 minus 8 for security + InstKindLimit[IDAlu] = TII->getMaxAlusPerClause(); const AMDGPUSubtarget &ST = DAG->TM.getSubtarget<AMDGPUSubtarget>(); |