diff options
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/force-align-stack-alloca.ll | 4 |
2 files changed, 6 insertions, 4 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index acf53f81ff..a3972b3e3e 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -72,13 +72,15 @@ X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm, SlotSize = 8; StackPtr = X86::RSP; FramePtr = X86::RBP; - BasePtr = X86::RBX; } else { SlotSize = 4; StackPtr = X86::ESP; FramePtr = X86::EBP; - BasePtr = X86::EBX; } + // Use a callee-saved register as the base pointer. These registers must + // not conflict with any ABI requirements. For example, in 32-bit mode PIC + // requires GOT in the EBX register before function calls via PLT GOT pointer. + BasePtr = Is64Bit ? X86::RBX : X86::ESI; } /// getCompactUnwindRegNum - This function maps the register to the number for diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll index 4ab906797a..2ada194f89 100644 --- a/test/CodeGen/X86/force-align-stack-alloca.ll +++ b/test/CodeGen/X86/force-align-stack-alloca.ll @@ -24,8 +24,8 @@ define i64 @g(i32 %i) nounwind { ; CHECK-NEXT: andl $-32, %esp ; CHECK-NEXT: subl $32, %esp ; -; Now setup the base pointer (%ebx). -; CHECK-NEXT: movl %esp, %ebx +; Now setup the base pointer (%esi). +; CHECK-NEXT: movl %esp, %esi ; CHECK-NOT: {{[^ ,]*}}, %esp ; ; The next adjustment of the stack is due to the alloca. |