diff options
-rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/SparcV8/SparcV8RegisterInfo.cpp | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index 6817b7ec46..7acf882db7 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -71,15 +71,15 @@ void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const { // Eventually this should emit the correct save instruction based on the // number of bytes in the frame. For now we just hardcode it. - BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP); + BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-112).addReg(V8::SP); } void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { MachineBasicBlock::iterator MBBI = prior(MBB.end()); - assert(MBBI->getOpcode() == V8::JMPLi && - "Can only put epilog before return instruction!"); - BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7); + assert(MBBI->getOpcode() == V8::RETL && + "Can only put epilog before 'retl' instruction!"); + BuildMI(MBB, MBBI, V8::RESTORErr, 2, V8::G0).addReg(V8::G0).addReg(V8::G0); } diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp index 6817b7ec46..7acf882db7 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp @@ -71,15 +71,15 @@ void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const { // Eventually this should emit the correct save instruction based on the // number of bytes in the frame. For now we just hardcode it. - BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP); + BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-112).addReg(V8::SP); } void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { MachineBasicBlock::iterator MBBI = prior(MBB.end()); - assert(MBBI->getOpcode() == V8::JMPLi && - "Can only put epilog before return instruction!"); - BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7); + assert(MBBI->getOpcode() == V8::RETL && + "Can only put epilog before 'retl' instruction!"); + BuildMI(MBB, MBBI, V8::RESTORErr, 2, V8::G0).addReg(V8::G0).addReg(V8::G0); } |