diff options
-rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 11 | ||||
-rw-r--r-- | test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll | 20 |
2 files changed, 28 insertions, 3 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 635e0cc825..2535d78cd9 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -29,15 +29,20 @@ using namespace llvm; /// part of a super-register. static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg, const TargetRegisterInfo *TRI) { + bool SeenSuperUse = false; + bool SeenSuperDef = false; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isRegister() || !MO.isUse()) + if (!MO.isRegister()) continue; if (TRI->isSuperRegister(SubReg, MO.getReg())) - return true; + if (MO.isUse()) + SeenSuperUse = true; + else if (MO.isImplicit()) + SeenSuperDef = true; } - return false; + return SeenSuperDef && SeenSuperUse; } static bool RedefinesSuperRegPart(const MachineInstr *MI, diff --git a/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll b/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll new file mode 100644 index 0000000000..70f1774b4c --- /dev/null +++ b/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 + +@accum = external global { double, double } ; <{ double, double }*> [#uses=1] +@.str = external constant [4 x i8] ; <[4 x i8]*> [#uses=1] + +define i32 @main() { +entry: + br label %bb74.i +bb74.i: ; preds = %bb88.i, %bb74.i, %entry + br i1 false, label %bb88.i, label %bb74.i +bb88.i: ; preds = %bb74.i + br i1 false, label %mandel.exit, label %bb74.i +mandel.exit: ; preds = %bb88.i + %tmp2 = volatile load double* getelementptr ({ double, double }* @accum, i32 0, i32 0), align 8 ; <double> [#uses=1] + %tmp23 = fptosi double %tmp2 to i32 ; <i32> [#uses=1] + %tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %tmp23 ) ; <i32> [#uses=0] + ret i32 0 +} + +declare i32 @printf(i8*, ...) |