diff options
| -rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 1 | ||||
| -rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 91ba3ada12..fcd0016ca0 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -227,6 +227,7 @@ public: const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const { assert(0 && "Target didn't implement TargetInstrInfo::copyRegToReg!"); + return false; } virtual void storeRegToStackSlot(MachineBasicBlock &MBB, diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 45be66fe8d..6c1d8ab502 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -547,7 +547,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " const unsigned Empty_AliasSet[] = { 0 };\n"; // Loop over all of the registers which have aliases, emitting the alias list // to memory. - for (std::map<Record*, std::set<Record*> >::iterator + for (std::map<Record*, std::set<Record*>, LessRecord >::iterator I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) { OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { "; for (std::set<Record*>::iterator ASI = I->second.begin(), @@ -584,7 +584,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " const unsigned Empty_SuperRegsSet[] = { 0 };\n"; // Loop over all of the registers which have super-registers, emitting the // super-registers list to memory. - for (std::map<Record*, std::set<Record*> >::iterator + for (std::map<Record*, std::set<Record*>, LessRecord >::iterator I = RegisterSuperRegs.begin(), E = RegisterSuperRegs.end(); I != E; ++I) { OS << " const unsigned " << I->first->getName() << "_SuperRegsSet[] = { "; |