diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.h | 3 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 1 |
3 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index 211a272bff..c7f33c8a15 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -146,3 +146,8 @@ MachineInstr *PPCInstrInfo::commuteInstruction(MachineInstr *MI) const { MI->getOperand(5).setImmedValue((MB-1) & 31); return MI; } + +void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI) const { + BuildMI(MBB, MI, PPC::NOP, 0); +} diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h index f046e5dfb0..b10de48bbd 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.h +++ b/lib/Target/PowerPC/PPCInstrInfo.h @@ -46,6 +46,9 @@ public: // rotate amt is zero. We also have to munge the immediates a bit. virtual MachineInstr *commuteInstruction(MachineInstr *MI) const; + virtual void insertNoop(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI) const; + static unsigned invertPPCBranchOpcode(unsigned Opcode) { switch (Opcode) { default: assert(0 && "Unknown PPC branch opcode!"); diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 881b17afcf..dba64c1aad 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -229,7 +229,6 @@ let usesCustomDAGSchedInserter = 1 in { // Expanded by the scheduler. i32imm:$BROPC), "; SELECT_CC PSEUDO!", []>; } - let isTerminator = 1, noResults = 1 in { let isReturn = 1 in def BLR : XLForm_2_ext<19, 16, 20, 0, 0, (ops), "blr", BrB, [(retflag)]>; |