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-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp4
-rw-r--r--test/MC/ARM/basic-arm-instructions.s2
2 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 07f8f42329..153bed4c7b 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2140,6 +2140,7 @@ int ARMAsmParser::tryParseShiftRegister(
std::string lowerCase = Tok.getString().lower();
ARM_AM::ShiftOpc ShiftTy = StringSwitch<ARM_AM::ShiftOpc>(lowerCase)
+ .Case("asl", ARM_AM::lsl)
.Case("lsl", ARM_AM::lsl)
.Case("lsr", ARM_AM::lsr)
.Case("asr", ARM_AM::asr)
@@ -3901,7 +3902,8 @@ bool ARMAsmParser::parseMemRegOffsetShift(ARM_AM::ShiftOpc &St,
if (Tok.isNot(AsmToken::Identifier))
return true;
StringRef ShiftName = Tok.getString();
- if (ShiftName == "lsl" || ShiftName == "LSL")
+ if (ShiftName == "lsl" || ShiftName == "LSL" ||
+ ShiftName == "asl" || ShiftName == "ASL")
St = ARM_AM::lsl;
else if (ShiftName == "lsr" || ShiftName == "LSR")
St = ARM_AM::lsr;
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index 2d8fbe173d..ba61ecba87 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -153,6 +153,7 @@ Lforward:
add r4, r5, r6, asr #5
add r4, r5, r6, ror #5
add r6, r7, r8, lsl r9
+ add r4, r4, r3, asl r9
add r6, r7, r8, lsr r9
add r6, r7, r8, asr r9
add r6, r7, r8, ror r9
@@ -180,6 +181,7 @@ Lforward:
@ CHECK: add r4, r5, r6, asr #5 @ encoding: [0xc6,0x42,0x85,0xe0]
@ CHECK: add r4, r5, r6, ror #5 @ encoding: [0xe6,0x42,0x85,0xe0]
@ CHECK: add r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x87,0xe0]
+@ CHECK: add r4, r4, r3, lsl r9 @ encoding: [0x13,0x49,0x84,0xe0]
@ CHECK: add r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x87,0xe0]
@ CHECK: add r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x87,0xe0]
@ CHECK: add r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0xe0]