diff options
| -rw-r--r-- | lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/InstrSelection/InstrSelection.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/InstrSched/InstrScheduling.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/InstrSelection/InstrSelection.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp | 2 |
8 files changed, 8 insertions, 8 deletions
diff --git a/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp b/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp index 295a9ed5e5..edf68868d4 100644 --- a/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp +++ b/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp @@ -15,7 +15,7 @@ AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>()); -cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::NoFlags, +cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden, "enable live-variable debugging information", clEnumValN(LV_DEBUG_None , "n", "disable debug output"), clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"), diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index d219ef6b6d..0a6d1ce353 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -19,7 +19,7 @@ using std::vector; //************************* External Data Types *****************************/ -cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::NoFlags, +cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden, "enable instruction scheduling debugging information", clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"), clEnumValN(Sched_Disable, "off", "disable instruction scheduling"), diff --git a/lib/CodeGen/InstrSelection/InstrSelection.cpp b/lib/CodeGen/InstrSelection/InstrSelection.cpp index 0776b15974..614c5f6773 100644 --- a/lib/CodeGen/InstrSelection/InstrSelection.cpp +++ b/lib/CodeGen/InstrSelection/InstrSelection.cpp @@ -39,7 +39,7 @@ enum SelectDebugLevel_t { }; // Enable Debug Options to be specified on the command line -cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::NoFlags, +cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::Hidden, "enable instruction selection debugging information", clEnumValN(Select_NoDebugInfo, "n", "disable debug output"), clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"), diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp index 785a12411a..ab9b1a7b17 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp +++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp @@ -32,7 +32,7 @@ using std::cerr; // ***TODO: There are several places we add instructions. Validate the order // of adding these instructions. -cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::NoFlags, +cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden, "enable register allocation debugging information", clEnumValN(RA_DEBUG_None , "n", "disable debug output"), clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"), diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index d219ef6b6d..0a6d1ce353 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -19,7 +19,7 @@ using std::vector; //************************* External Data Types *****************************/ -cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::NoFlags, +cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden, "enable instruction scheduling debugging information", clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"), clEnumValN(Sched_Disable, "off", "disable instruction scheduling"), diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp index 0776b15974..614c5f6773 100644 --- a/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp +++ b/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp @@ -39,7 +39,7 @@ enum SelectDebugLevel_t { }; // Enable Debug Options to be specified on the command line -cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::NoFlags, +cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::Hidden, "enable instruction selection debugging information", clEnumValN(Select_NoDebugInfo, "n", "disable debug output"), clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"), diff --git a/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp b/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp index 295a9ed5e5..edf68868d4 100644 --- a/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp +++ b/lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp @@ -15,7 +15,7 @@ AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>()); -cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::NoFlags, +cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden, "enable live-variable debugging information", clEnumValN(LV_DEBUG_None , "n", "disable debug output"), clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"), diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp index 785a12411a..ab9b1a7b17 100644 --- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp +++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp @@ -32,7 +32,7 @@ using std::cerr; // ***TODO: There are several places we add instructions. Validate the order // of adding these instructions. -cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::NoFlags, +cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden, "enable register allocation debugging information", clEnumValN(RA_DEBUG_None , "n", "disable debug output"), clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"), |