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-rw-r--r--lib/MC/ELFObjectWriter.cpp17
-rw-r--r--lib/MC/MachObjectWriter.cpp2
-rw-r--r--lib/MC/WinCOFFObjectWriter.cpp1
-rw-r--r--lib/Target/X86/X86AsmBackend.cpp1
-rw-r--r--lib/Target/X86/X86FixupKinds.h5
-rw-r--r--lib/Target/X86/X86MCCodeEmitter.cpp21
-rw-r--r--test/MC/ELF/relocation.s46
7 files changed, 73 insertions, 20 deletions
diff --git a/lib/MC/ELFObjectWriter.cpp b/lib/MC/ELFObjectWriter.cpp
index 94251d76b2..a80e7b6b08 100644
--- a/lib/MC/ELFObjectWriter.cpp
+++ b/lib/MC/ELFObjectWriter.cpp
@@ -577,16 +577,13 @@ void ELFObjectWriterImpl::RecordRelocation(const MCAssembler &Asm,
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
case FK_Data_8: Type = ELF::R_X86_64_64; break;
+ case X86::reloc_signed_4byte:
case X86::reloc_pcrel_4byte:
+ assert(isInt<32>(Target.getConstant()));
+ Type = ELF::R_X86_64_32S;
+ break;
case FK_Data_4:
- // check that the offset fits within a signed long
- if (Target.getConstant() < 0) {
- assert(isInt<32>(Target.getConstant()));
- Type = ELF::R_X86_64_32S;
- } else {
- assert(isUInt<32>(Target.getConstant()));
- Type = ELF::R_X86_64_32;
- }
+ Type = ELF::R_X86_64_32;
break;
case FK_Data_2: Type = ELF::R_X86_64_16; break;
case X86::reloc_pcrel_1byte:
@@ -599,6 +596,10 @@ void ELFObjectWriterImpl::RecordRelocation(const MCAssembler &Asm,
} else {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
+
+ // FIXME: Should we avoid selecting reloc_signed_4byte in 32 bit mode
+ // instead?
+ case X86::reloc_signed_4byte:
case X86::reloc_pcrel_4byte:
case FK_Data_4: Type = ELF::R_386_32; break;
case FK_Data_2: Type = ELF::R_386_16; break;
diff --git a/lib/MC/MachObjectWriter.cpp b/lib/MC/MachObjectWriter.cpp
index 02a5575606..689aabc333 100644
--- a/lib/MC/MachObjectWriter.cpp
+++ b/lib/MC/MachObjectWriter.cpp
@@ -28,6 +28,7 @@
#include <vector>
using namespace llvm;
+// FIXME: this has been copied from (or to) X86AsmBackend.cpp
static unsigned getFixupKindLog2Size(unsigned Kind) {
switch (Kind) {
default: llvm_unreachable("invalid fixup kind!");
@@ -38,6 +39,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
case X86::reloc_pcrel_4byte:
case X86::reloc_riprel_4byte:
case X86::reloc_riprel_4byte_movq_load:
+ case X86::reloc_signed_4byte:
case FK_Data_4: return 2;
case FK_Data_8: return 3;
}
diff --git a/lib/MC/WinCOFFObjectWriter.cpp b/lib/MC/WinCOFFObjectWriter.cpp
index 1cc5c09a08..82ccddf81d 100644
--- a/lib/MC/WinCOFFObjectWriter.cpp
+++ b/lib/MC/WinCOFFObjectWriter.cpp
@@ -679,6 +679,7 @@ void WinCOFFObjectWriter::RecordRelocation(const MCAssembler &Asm,
FixedValue += 4;
break;
case FK_Data_4:
+ case X86::reloc_signed_4byte:
Reloc.Data.Type = Is64Bit ? COFF::IMAGE_REL_AMD64_ADDR32
: COFF::IMAGE_REL_I386_DIR32;
break;
diff --git a/lib/Target/X86/X86AsmBackend.cpp b/lib/Target/X86/X86AsmBackend.cpp
index 231f151206..d9c6daa2cc 100644
--- a/lib/Target/X86/X86AsmBackend.cpp
+++ b/lib/Target/X86/X86AsmBackend.cpp
@@ -36,6 +36,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
case X86::reloc_pcrel_4byte:
case X86::reloc_riprel_4byte:
case X86::reloc_riprel_4byte_movq_load:
+ case X86::reloc_signed_4byte:
case FK_Data_4: return 2;
case FK_Data_8: return 3;
}
diff --git a/lib/Target/X86/X86FixupKinds.h b/lib/Target/X86/X86FixupKinds.h
index 96e0aaec58..f408a413f0 100644
--- a/lib/Target/X86/X86FixupKinds.h
+++ b/lib/Target/X86/X86FixupKinds.h
@@ -19,7 +19,10 @@ enum Fixups {
reloc_pcrel_1byte, // 8-bit pcrel, e.g. branch_1
reloc_pcrel_2byte, // 16-bit pcrel, e.g. callw
reloc_riprel_4byte, // 32-bit rip-relative
- reloc_riprel_4byte_movq_load // 32-bit rip-relative in movq
+ reloc_riprel_4byte_movq_load, // 32-bit rip-relative in movq
+ reloc_signed_4byte // 32-bit signed. Unlike FK_Data_4
+ // this will be sign extended at
+ // runtime.
};
}
}
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 3b82a5d32c..cdc8a1d431 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -38,7 +38,7 @@ public:
~X86MCCodeEmitter() {}
unsigned getNumFixupKinds() const {
- return 5;
+ return 6;
}
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
@@ -47,7 +47,8 @@ public:
{ "reloc_pcrel_1byte", 0, 1 * 8, MCFixupKindInfo::FKF_IsPCRel },
{ "reloc_pcrel_2byte", 0, 2 * 8, MCFixupKindInfo::FKF_IsPCRel },
{ "reloc_riprel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
- { "reloc_riprel_4byte_movq_load", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel }
+ { "reloc_riprel_4byte_movq_load", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
+ { "reloc_signed_4byte", 0, 4 * 8, 0}
};
if (Kind < FirstTargetFixupKind)
@@ -307,7 +308,8 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
// Otherwise, emit the most general non-SIB encoding: [REG+disp32]
EmitByte(ModRMByte(2, RegOpcodeField, BaseRegNo), CurByte, OS);
- EmitImmediate(Disp, 4, FK_Data_4, CurByte, OS, Fixups);
+ EmitImmediate(Disp, 4, MCFixupKind(X86::reloc_signed_4byte), CurByte, OS,
+ Fixups);
return;
}
@@ -367,7 +369,8 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
if (ForceDisp8)
EmitImmediate(Disp, 1, FK_Data_1, CurByte, OS, Fixups);
else if (ForceDisp32 || Disp.getImm() != 0)
- EmitImmediate(Disp, 4, FK_Data_4, CurByte, OS, Fixups);
+ EmitImmediate(Disp, 4, MCFixupKind(X86::reloc_signed_4byte), CurByte, OS,
+ Fixups);
}
/// EmitVEXOpcodePrefix - AVX instructions are encoded using a opcode prefix
@@ -983,10 +986,16 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
RegNum |= GetX86RegNum(MO) << 4;
EmitImmediate(MCOperand::CreateImm(RegNum), 1, FK_Data_1, CurByte, OS,
Fixups);
- } else
+ } else {
+ unsigned FixupKind;
+ if (MI.getOpcode() == X86::MOV64ri32 || MI.getOpcode() == X86::MOV64mi32)
+ FixupKind = X86::reloc_signed_4byte;
+ else
+ FixupKind = getImmFixupKind(TSFlags);
EmitImmediate(MI.getOperand(CurOp++),
- X86II::getSizeOfImm(TSFlags), getImmFixupKind(TSFlags),
+ X86II::getSizeOfImm(TSFlags), MCFixupKind(FixupKind),
CurByte, OS, Fixups);
+ }
}
diff --git a/test/MC/ELF/relocation.s b/test/MC/ELF/relocation.s
index b9b87dd204..a8f4e5f29d 100644
--- a/test/MC/ELF/relocation.s
+++ b/test/MC/ELF/relocation.s
@@ -1,12 +1,48 @@
// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s
-// Test that we produce a R_X86_64_32.
+// Test that we produce a R_X86_64_32S or R_X86_64_32.
- .long Lset1
+bar:
+ movl $bar, %edx // R_X86_64_32
+ movq $bar, %rdx // R_X86_64_32S
+ movq $bar, bar(%rip) // R_X86_64_32S
+ movl bar, %edx // R_X86_64_32S
+ movq bar, %rdx // R_X86_64_32S
+.long bar // R_X86_64_32
// CHECK: # Relocation 0
-// CHECK-NEXT: (('r_offset', 0)
-// CHECK-NEXT: ('r_sym', 4)
+// CHECK-NEXT: (('r_offset', 1)
+// CHECK-NEXT: ('r_sym',
// CHECK-NEXT: ('r_type', 10)
-// CHECK-NEXT: ('r_addend', 0)
+// CHECK-NEXT: ('r_addend',
+
+// CHECK: # Relocation 1
+// CHECK-NEXT: (('r_offset', 8)
+// CHECK-NEXT: ('r_sym',
+// CHECK-NEXT: ('r_type', 11)
+// CHECK-NEXT: ('r_addend',
+
+// CHECK: # Relocation 2
+// CHECK-NEXT: (('r_offset', 19)
+// CHECK-NEXT: ('r_sym',
+// CHECK-NEXT: ('r_type', 11)
+// CHECK-NEXT: ('r_addend',
+
+// CHECK: # Relocation 3
+// CHECK-NEXT: (('r_offset', 26)
+// CHECK-NEXT: ('r_sym',
+// CHECK-NEXT: ('r_type', 11)
+// CHECK-NEXT: ('r_addend',
+
+// CHECK: # Relocation 4
+// CHECK-NEXT: (('r_offset', 34)
+// CHECK-NEXT: ('r_sym',
+// CHECK-NEXT: ('r_type', 11)
+// CHECK-NEXT: ('r_addend',
+
+// CHECK: # Relocation 5
+// CHECK-NEXT: (('r_offset', 38)
+// CHECK-NEXT: ('r_sym',
+// CHECK-NEXT: ('r_type', 10)
+// CHECK-NEXT: ('r_addend',
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-06-25 18:24:37 +0000