diff options
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 992fba72ca..d9facda10e 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -502,7 +502,7 @@ void ISel::visitDivRem(BinaryOperator &I) { if (isSigned) { // Emit a sign extension instruction... - BuildMI(BB, ExtOpcode[Class], 1, ExtReg).addReg(Reg); + BuildMI(BB, ExtOpcode[Class], 0); } else { // If unsigned, emit a zeroing instruction... (reg = xor reg, reg) BuildMI(BB, ClrOpcode[Class], 2, ExtReg).addReg(ExtReg).addReg(ExtReg); diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 992fba72ca..d9facda10e 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -502,7 +502,7 @@ void ISel::visitDivRem(BinaryOperator &I) { if (isSigned) { // Emit a sign extension instruction... - BuildMI(BB, ExtOpcode[Class], 1, ExtReg).addReg(Reg); + BuildMI(BB, ExtOpcode[Class], 0); } else { // If unsigned, emit a zeroing instruction... (reg = xor reg, reg) BuildMI(BB, ClrOpcode[Class], 2, ExtReg).addReg(ExtReg).addReg(ExtReg); |