diff options
| -rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 4 | ||||
| -rw-r--r-- | test/MC/AsmParser/X86/x86_instructions.s | 10 |
2 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index e028d41ea8..dc86484bd4 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1119,7 +1119,8 @@ MatchAndEmitInstruction(SMLoc IDLoc, // First, handle aliases that expand to multiple instructions. // FIXME: This should be replaced with a real .td file alias mechanism. - if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw") { + if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" || + Op->getToken() == "finit") { MCInst Inst; Inst.setOpcode(X86::WAIT); Out.EmitInstruction(Inst); @@ -1129,6 +1130,7 @@ MatchAndEmitInstruction(SMLoc IDLoc, StringSwitch<const char*>(Op->getToken()) .Case("fstsw", "fnstsw") .Case("fstcw", "fnstcw") + .Case("finit", "fninit") .Default(0); assert(Repl && "Unknown wait-prefixed instruction"); Operands[0] = X86Operand::CreateToken(Repl, IDLoc); diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s index b2ac5ad456..4731a0857d 100644 --- a/test/MC/AsmParser/X86/x86_instructions.s +++ b/test/MC/AsmParser/X86/x86_instructions.s @@ -421,6 +421,16 @@ fstcw (%rsp) // CHECK: wait // CHECK: fnstcw (%rsp) +// PR8259 +fstcw (%rsp) +// CHECK: wait +// CHECK: fnstcw (%rsp) + +// PR8258 +finit +// CHECK: wait +// CHECK: fninit + // rdar://8456382 - cvtsd2si support. cvtsd2si %xmm1, %rax |