diff options
| -rw-r--r-- | include/llvm/CodeGen/ScheduleDAG.h | 5 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 2 |
3 files changed, 5 insertions, 4 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index 4b65bd23e3..e120e08593 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -164,7 +164,7 @@ namespace llvm { return true; } - bool removePred(SUnit *N, bool isCtrl, bool isArtificial) { + bool removePred(SUnit *N, bool isCtrl, bool isArtificial, bool isAntiDep) { for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end(); I != E; ++I) if (I->Dep == N && I->isCtrl == isCtrl && I->isArtificial == isArtificial) { @@ -172,7 +172,8 @@ namespace llvm { for (SmallVector<SDep, 4>::iterator II = N->Succs.begin(), EE = N->Succs.end(); II != EE; ++II) if (II->Dep == this && - II->isCtrl == isCtrl && II->isArtificial == isArtificial) { + II->isCtrl == isCtrl && II->isArtificial == isArtificial && + II->isAntiDep == isAntiDep) { FoundSucc = true; N->Succs.erase(II); break; diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp index 55fd7e4abc..d0b8927abe 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -198,7 +198,7 @@ bool ScheduleDAGFast::AddPred(SUnit *Y, SUnit *X, bool isCtrl, /// the current node M. bool ScheduleDAGFast::RemovePred(SUnit *M, SUnit *N, bool isCtrl, bool isArtificial) { - return M->removePred(N, isCtrl, isArtificial); + return M->removePred(N, isCtrl, isArtificial, false); } /// CopyAndMoveSuccessors - Clone the specified node and move its scheduled diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 03a91cffde..16f9950295 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -506,7 +506,7 @@ bool ScheduleDAGRRList::AddPred(SUnit *Y, SUnit *X, bool isCtrl, bool ScheduleDAGRRList::RemovePred(SUnit *M, SUnit *N, bool isCtrl, bool isArtificial) { // InitDAGTopologicalSorting(); - return M->removePred(N, isCtrl, isArtificial); + return M->removePred(N, isCtrl, isArtificial, false); } /// DFS - Make a DFS traversal to mark all nodes reachable from SU and mark |