diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 1 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 1 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8InstrInfo.td | 1 | ||||
| -rw-r--r-- | lib/Target/SparcV9/SparcV9.td | 1 | ||||
| -rw-r--r-- | lib/Target/Target.td | 1 |
5 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index bec1c5d336..7e54786f8c 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -56,7 +56,6 @@ class PPC32I<string name, bits<6> opcode, bit ppc64, bit vmx> : Instruction { let Name = name; let Namespace = "PPC32"; - let ClassPrefix = "PowerPC"; let Inst{0-5} = opcode; } diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 5e61d51329..07491eb1c1 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -19,7 +19,6 @@ class InstV8 : Instruction { // SparcV8 instruction baseline field bits<32> Inst; let Namespace = "V8"; - let ClassPrefix = "SparcV8"; bits<2> op; let Inst{31-30} = op; // Top two bits are the 'op' field diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index 5e61d51329..07491eb1c1 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -19,7 +19,6 @@ class InstV8 : Instruction { // SparcV8 instruction baseline field bits<32> Inst; let Namespace = "V8"; - let ClassPrefix = "SparcV8"; bits<2> op; let Inst{31-30} = op; // Top two bits are the 'op' field diff --git a/lib/Target/SparcV9/SparcV9.td b/lib/Target/SparcV9/SparcV9.td index 2adc5006de..f78317ddae 100644 --- a/lib/Target/SparcV9/SparcV9.td +++ b/lib/Target/SparcV9/SparcV9.td @@ -24,7 +24,6 @@ class InstV9 : Instruction { // SparcV9 instruction baseline field bits<32> Inst; let Namespace = "V9"; - let ClassPrefix = "SparcV9"; bits<2> op; let Inst{31-30} = op; // Top two bits are the 'op' field diff --git a/lib/Target/Target.td b/lib/Target/Target.td index 6fada3452e..e111f85d0f 100644 --- a/lib/Target/Target.td +++ b/lib/Target/Target.td @@ -108,7 +108,6 @@ class RegisterClass<ValueType regType, int alignment, list<Register> regList> { class Instruction { string Name = ""; // The opcode string for this instruction string Namespace = ""; - string ClassPrefix = ""; dag OperandList; // An dag containing the MI operand list. string AsmString = ""; // The .s format to print the instruction with. |