diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 27 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/recipest.ll | 48 |
2 files changed, 75 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index e33d2cc716..8195f5eb05 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -6849,6 +6849,33 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), N->getOperand(0), RV); } + } else if (N->getOperand(1).getOpcode() == ISD::FP_EXTEND && + N->getOperand(1).getOperand(0).getOpcode() == ISD::FSQRT) { + SDValue RV = + DAGCombineFastRecipFSQRT(N->getOperand(1).getOperand(0).getOperand(0), + DCI); + if (RV.getNode() != 0) { + DCI.AddToWorklist(RV.getNode()); + RV = DAG.getNode(ISD::FP_EXTEND, N->getOperand(1).getDebugLoc(), + N->getValueType(0), RV); + DCI.AddToWorklist(RV.getNode()); + return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), + N->getOperand(0), RV); + } + } else if (N->getOperand(1).getOpcode() == ISD::FP_ROUND && + N->getOperand(1).getOperand(0).getOpcode() == ISD::FSQRT) { + SDValue RV = + DAGCombineFastRecipFSQRT(N->getOperand(1).getOperand(0).getOperand(0), + DCI); + if (RV.getNode() != 0) { + DCI.AddToWorklist(RV.getNode()); + RV = DAG.getNode(ISD::FP_ROUND, N->getOperand(1).getDebugLoc(), + N->getValueType(0), RV, + N->getOperand(1).getOperand(1)); + DCI.AddToWorklist(RV.getNode()); + return DAG.getNode(ISD::FMUL, dl, N->getValueType(0), + N->getOperand(0), RV); + } } SDValue RV = DAGCombineFastRecip(N->getOperand(1), DCI); diff --git a/test/CodeGen/PowerPC/recipest.ll b/test/CodeGen/PowerPC/recipest.ll index cad98c5a35..89705faa46 100644 --- a/test/CodeGen/PowerPC/recipest.ll +++ b/test/CodeGen/PowerPC/recipest.ll @@ -31,6 +31,54 @@ entry: ; CHECK-SAFE: blr } +define double @foof(double %a, float %b) nounwind { +entry: + %x = call float @llvm.sqrt.f32(float %b) + %y = fpext float %x to double + %r = fdiv double %a, %y + ret double %r + +; CHECK: @foof +; CHECK: frsqrtes +; CHECK: fnmsubs +; CHECK: fmuls +; CHECK: fmadds +; CHECK: fmuls +; CHECK: fmul +; CHECK: blr + +; CHECK-SAFE: @foof +; CHECK-SAFE: fsqrts +; CHECK-SAFE: fdiv +; CHECK-SAFE: blr +} + +define float @food(float %a, double %b) nounwind { +entry: + %x = call double @llvm.sqrt.f64(double %b) + %y = fptrunc double %x to float + %r = fdiv float %a, %y + ret float %r + +; CHECK: @foo +; CHECK: frsqrte +; CHECK: fnmsub +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: frsp +; CHECK: fmuls +; CHECK: blr + +; CHECK-SAFE: @foo +; CHECK-SAFE: fsqrt +; CHECK-SAFE: fdivs +; CHECK-SAFE: blr +} + define float @goo(float %a, float %b) nounwind { entry: %x = call float @llvm.sqrt.f32(float %b) |