diff options
| -rw-r--r-- | lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp | 13 | ||||
| -rw-r--r-- | lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp | 13 |
2 files changed, 12 insertions, 14 deletions
diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp index 86a7e7042c..8f35be8a07 100644 --- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp +++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp @@ -186,12 +186,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr, immedValue); if (opType == MachineOperand::MO_VirtualRegister) constantThatMustBeLoaded = true; - else { - // The optype has changed from being a register to an immediate - // This means we need to change the opcode, e.g. ADDr -> ADDi - unsigned newOpcode = convertOpcodeFromRegToImm(opCode); - minstr->setOpcode(newOpcode); - } } } else @@ -209,7 +203,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr, opCode, target, (immedPos == (int)op), machineRegNum, immedValue); - if (opType == MachineOperand::MO_SignExtendedImmed) { + if (opType == MachineOperand::MO_SignExtendedImmed || + opType == MachineOperand::MO_UnextendedImmed) { // The optype is an immediate value // This means we need to change the opcode, e.g. ADDr -> ADDi unsigned newOpcode = convertOpcodeFromRegToImm(opCode); @@ -233,6 +228,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr, else if (opType == MachineOperand::MO_SignExtendedImmed || opType == MachineOperand::MO_UnextendedImmed) { minstr->SetMachineOperandConst(op, opType, immedValue); + // The optype is or has become an immediate + // This means we need to change the opcode, e.g. ADDr -> ADDi + unsigned newOpcode = convertOpcodeFromRegToImm(opCode); + minstr->setOpcode(newOpcode); } else if (constantThatMustBeLoaded || (opValue && isa<GlobalValue>(opValue))) { // opValue is a constant that must be explicitly loaded into a reg diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp index 86a7e7042c..8f35be8a07 100644 --- a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp +++ b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp @@ -186,12 +186,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr, immedValue); if (opType == MachineOperand::MO_VirtualRegister) constantThatMustBeLoaded = true; - else { - // The optype has changed from being a register to an immediate - // This means we need to change the opcode, e.g. ADDr -> ADDi - unsigned newOpcode = convertOpcodeFromRegToImm(opCode); - minstr->setOpcode(newOpcode); - } } } else @@ -209,7 +203,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr, opCode, target, (immedPos == (int)op), machineRegNum, immedValue); - if (opType == MachineOperand::MO_SignExtendedImmed) { + if (opType == MachineOperand::MO_SignExtendedImmed || + opType == MachineOperand::MO_UnextendedImmed) { // The optype is an immediate value // This means we need to change the opcode, e.g. ADDr -> ADDi unsigned newOpcode = convertOpcodeFromRegToImm(opCode); @@ -233,6 +228,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr, else if (opType == MachineOperand::MO_SignExtendedImmed || opType == MachineOperand::MO_UnextendedImmed) { minstr->SetMachineOperandConst(op, opType, immedValue); + // The optype is or has become an immediate + // This means we need to change the opcode, e.g. ADDr -> ADDi + unsigned newOpcode = convertOpcodeFromRegToImm(opCode); + minstr->setOpcode(newOpcode); } else if (constantThatMustBeLoaded || (opValue && isa<GlobalValue>(opValue))) { // opValue is a constant that must be explicitly loaded into a reg |