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| -rw-r--r-- | lib/Target/Mips/MipsDSPInstrFormats.td | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsDSPInstrFormats.td b/lib/Target/Mips/MipsDSPInstrFormats.td new file mode 100644 index 0000000000..d9bcccc617 --- /dev/null +++ b/lib/Target/Mips/MipsDSPInstrFormats.td @@ -0,0 +1,25 @@ +//===- MipsDSPInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +def HasDSP : Predicate<"Subtarget.hasDSP()">, + AssemblerPredicate<"FeatureDSP">; +def HasDSPR2 : Predicate<"Subtarget.hasDSPR2()">, + AssemblerPredicate<"FeatureDSPR2">; + +// Fields. +class Field6<bits<6> val> { + bits<6> V = val; +} + +def SPECIAL3_OPCODE : Field6<0b011111>; +def REGIMM_OPCODE : Field6<0b000001>; + +class DSPInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> { + let Predicates = [HasDSP]; +} |