diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 3c4252a0c4..aad61477ef 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2354,11 +2354,13 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; case TargetLowering::Legal: break; case TargetLowering::Expand: { - // If this target supports fabs/fneg natively, do this efficiently. - if (TLI.getOperationAction(ISD::FABS, Tmp1.getValueType()) == - TargetLowering::Legal && + // If this target supports fabs/fneg natively and select is cheap, + // do this efficiently. + if (!TLI.isSelectExpensive() && + TLI.getOperationAction(ISD::FABS, Tmp1.getValueType()) == + TargetLowering::Legal && TLI.getOperationAction(ISD::FNEG, Tmp1.getValueType()) == - TargetLowering::Legal) { + TargetLowering::Legal) { // Get the sign bit of the RHS. MVT::ValueType IVT = Tmp2.getValueType() == MVT::f32 ? MVT::i32 : MVT::i64; |