diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 1 | ||||
| -rw-r--r-- | test/MC/ARM/neon-cmp-encoding.ll | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 691ef037bf..d100759948 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -2809,6 +2809,7 @@ def VCGEfq : N3VQ<1,0,0b00,0b1110,0, IIC_VBINQ, "vcge", "f32", v4i32, v4f32, defm VCGEz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00001, 0, "vcge", "s", "$dst, $src, #0">; // For disassembly only. +// FIXME: This instruction's encoding MAY NOT BE correct. defm VCLEz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00011, 0, "vcle", "s", "$dst, $src, #0">; diff --git a/test/MC/ARM/neon-cmp-encoding.ll b/test/MC/ARM/neon-cmp-encoding.ll index 16a415920c..955fea5238 100644 --- a/test/MC/ARM/neon-cmp-encoding.ll +++ b/test/MC/ARM/neon-cmp-encoding.ll @@ -79,3 +79,7 @@ define <4 x i32> @vceq_4xfloat(<4 x float>* %A, <4 x float>* %B) nounwind { %tmp4 = sext <4 x i1> %tmp3 to <4 x i32> ret <4 x i32> %tmp4 } + +; FIXME: We cannot currently test the vceq with immediate zero, because we do +; not code generate it at this time. + |