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-rw-r--r--test/CodeGen/ARM/lsr-unfolded-offset.ll12
-rw-r--r--test/CodeGen/ARM/tail-dup.ll10
-rw-r--r--test/CodeGen/ARM/vcvt_combine.ll16
-rw-r--r--test/CodeGen/ARM/vdiv_combine.ll17
-rw-r--r--test/CodeGen/Generic/crash.ll5
-rw-r--r--test/CodeGen/Hexagon/cmpb_pred.ll9
-rw-r--r--test/CodeGen/Hexagon/hwloop-const.ll8
-rw-r--r--test/CodeGen/Hexagon/hwloop-dbg.ll7
-rw-r--r--test/CodeGen/Hexagon/memops2.ll12
-rw-r--r--test/CodeGen/Hexagon/memops3.ll11
-rw-r--r--test/CodeGen/Hexagon/remove_lsr.ll12
-rw-r--r--test/CodeGen/Mips/alloca.ll18
-rw-r--r--test/CodeGen/Mips/divrem.ll8
-rw-r--r--test/CodeGen/Mips/eh.ll8
-rw-r--r--test/CodeGen/Mips/select.ll16
-rw-r--r--test/CodeGen/Mips/zeroreg.ll8
-rw-r--r--test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll35
-rw-r--r--test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll41
-rw-r--r--test/CodeGen/PowerPC/ctrloop-s000.ll68
-rw-r--r--test/CodeGen/PowerPC/ctrloop-sums.ll12
-rw-r--r--test/CodeGen/PowerPC/ctrloops.ll16
-rw-r--r--test/CodeGen/PowerPC/early-ret.ll12
-rw-r--r--test/CodeGen/PowerPC/lbzux.ll6
-rw-r--r--test/CodeGen/PowerPC/lsa.ll9
-rw-r--r--test/CodeGen/PowerPC/s000-alias-misched.ll20
-rw-r--r--test/CodeGen/PowerPC/stwu-gta.ll8
-rw-r--r--test/CodeGen/PowerPC/stwu8.ll6
-rw-r--r--test/CodeGen/R600/loop-address.ll5
-rw-r--r--test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll10
-rw-r--r--test/CodeGen/X86/2011-09-14-valcoalesce.ll6
-rw-r--r--test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll8
-rw-r--r--test/CodeGen/X86/2012-11-30-handlemove-dbg.ll5
-rw-r--r--test/CodeGen/X86/2013-03-13-VEX-DestReg.ll7
-rw-r--r--test/CodeGen/X86/block-placement.ll4
-rw-r--r--test/CodeGen/X86/coalescer-identity.ll12
-rw-r--r--test/CodeGen/X86/crash.ll2
-rw-r--r--test/CodeGen/X86/dbg-large-unsigned-const.ll7
-rw-r--r--test/CodeGen/X86/dbg-value-range.ll5
-rw-r--r--test/CodeGen/X86/misched-matmul.ll68
-rw-r--r--test/CodeGen/X86/misched-matrix.ll76
-rw-r--r--test/CodeGen/X86/pr12889.ll5
-rw-r--r--test/CodeGen/X86/subtarget-feature-change.ll16
-rw-r--r--test/CodeGen/X86/vararg_tailcall.ll32
-rw-r--r--test/CodeGen/X86/zext-extract_subreg.ll6
-rw-r--r--test/DebugInfo/X86/DW_AT_location-reference.ll9
-rw-r--r--test/DebugInfo/X86/elf-names.ll27
-rw-r--r--test/DebugInfo/X86/misched-dbg-value.ll21
-rw-r--r--test/Transforms/DeadStoreElimination/2011-09-06-EndOfFunction.ll10
-rw-r--r--test/Transforms/InstCombine/2012-05-27-Negative-Shift-Crash.ll16
-rw-r--r--test/Transforms/JumpThreading/2011-04-14-InfLoop.ll6
-rw-r--r--test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll14
-rw-r--r--test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll6
-rw-r--r--test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll8
-rw-r--r--test/Transforms/LoopVectorize/12-12-11-if-conv.ll8
-rw-r--r--test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll11
-rw-r--r--test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll8
-rw-r--r--test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll13
-rw-r--r--test/Transforms/LoopVectorize/X86/parallel-loops.ll33
-rw-r--r--test/Transforms/LoopVectorize/calloc.ll7
-rw-r--r--test/Transforms/LoopVectorize/dbg.value.ll9
-rw-r--r--test/Transforms/LoopVectorize/float-reduction.ll6
-rw-r--r--test/Transforms/LoopVectorize/i8-induction.ll10
-rw-r--r--test/Transforms/LoopVectorize/runtime-check.ll8
-rw-r--r--test/Transforms/LoopVectorize/start-non-zero.ll8
-rw-r--r--test/Transforms/LoopVectorize/struct_access.ll6
-rw-r--r--test/Transforms/LoopVectorize/vectorize-once.ll7
-rw-r--r--test/Transforms/MergeFunc/vector.ll9
-rw-r--r--test/Transforms/Reassociate/pr12245.ll44
-rw-r--r--test/Transforms/SLPVectorizer/X86/loopinvariant.ll36
69 files changed, 385 insertions, 639 deletions
diff --git a/test/CodeGen/ARM/lsr-unfolded-offset.ll b/test/CodeGen/ARM/lsr-unfolded-offset.ll
index 5b4cf9d816..9b0f3e54e8 100644
--- a/test/CodeGen/ARM/lsr-unfolded-offset.ll
+++ b/test/CodeGen/ARM/lsr-unfolded-offset.ll
@@ -26,8 +26,8 @@ outer.loop: ; preds = %for.inc69, %entry
%0 = phi i32 [ %inc71, %for.inc69 ], [ 0, %entry ]
%offset = getelementptr %struct.partition_entry* %part, i32 %0, i32 2
%len = getelementptr %struct.partition_entry* %part, i32 %0, i32 3
- %tmp5 = load i64* %offset, align 4, !tbaa !0
- %tmp15 = load i64* %len, align 4, !tbaa !0
+ %tmp5 = load i64* %offset, align 4
+ %tmp15 = load i64* %len, align 4
%add = add nsw i64 %tmp15, %tmp5
br label %inner.loop
@@ -40,8 +40,8 @@ inner.loop: ; preds = %for.inc, %outer.loo
if.end: ; preds = %inner.loop
%len39 = getelementptr %struct.partition_entry* %part, i32 %1, i32 3
%offset28 = getelementptr %struct.partition_entry* %part, i32 %1, i32 2
- %tmp29 = load i64* %offset28, align 4, !tbaa !0
- %tmp40 = load i64* %len39, align 4, !tbaa !0
+ %tmp29 = load i64* %offset28, align 4
+ %tmp40 = load i64* %len39, align 4
%add41 = add nsw i64 %tmp40, %tmp29
%cmp44 = icmp sge i64 %tmp29, %tmp5
%cmp47 = icmp slt i64 %tmp29, %add
@@ -74,7 +74,3 @@ for.end72: ; preds = %for.inc69, %entry
%overlap.0.lcssa = phi i32 [ 0, %entry ], [ %overlap.4, %for.inc69 ]
ret i32 %overlap.0.lcssa
}
-
-!0 = metadata !{metadata !"long long", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
diff --git a/test/CodeGen/ARM/tail-dup.ll b/test/CodeGen/ARM/tail-dup.ll
index e015bf098f..eb4d0bab92 100644
--- a/test/CodeGen/ARM/tail-dup.ll
+++ b/test/CodeGen/ARM/tail-dup.ll
@@ -11,19 +11,19 @@
define i32 @fn(i32* nocapture %opcodes) nounwind readonly ssp {
entry:
- %0 = load i32* %opcodes, align 4, !tbaa !0
+ %0 = load i32* %opcodes, align 4
%arrayidx = getelementptr inbounds [3 x i8*]* @fn.codetable, i32 0, i32 %0
br label %indirectgoto
INCREMENT: ; preds = %indirectgoto
%inc = add nsw i32 %result.0, 1
- %1 = load i32* %opcodes.addr.0, align 4, !tbaa !0
+ %1 = load i32* %opcodes.addr.0, align 4
%arrayidx2 = getelementptr inbounds [3 x i8*]* @fn.codetable, i32 0, i32 %1
br label %indirectgoto
DECREMENT: ; preds = %indirectgoto
%dec = add nsw i32 %result.0, -1
- %2 = load i32* %opcodes.addr.0, align 4, !tbaa !0
+ %2 = load i32* %opcodes.addr.0, align 4
%arrayidx4 = getelementptr inbounds [3 x i8*]* @fn.codetable, i32 0, i32 %2
br label %indirectgoto
@@ -38,7 +38,3 @@ indirectgoto: ; preds = %DECREMENT, %INCREME
RETURN: ; preds = %indirectgoto
ret i32 %result.0
}
-
-!0 = metadata !{metadata !"int", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
diff --git a/test/CodeGen/ARM/vcvt_combine.ll b/test/CodeGen/ARM/vcvt_combine.ll
index 3009e50c53..07ba230757 100644
--- a/test/CodeGen/ARM/vcvt_combine.ll
+++ b/test/CodeGen/ARM/vcvt_combine.ll
@@ -7,7 +7,7 @@
; CHECK-NOT: vmul
define void @t0() nounwind {
entry:
- %tmp = load float* @in, align 4, !tbaa !0
+ %tmp = load float* @in, align 4
%vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0
%vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1
%mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00>
@@ -23,7 +23,7 @@ declare void @foo_int32x2_t(<2 x i32>)
; CHECK-NOT: vmul
define void @t1() nounwind {
entry:
- %tmp = load float* @in, align 4, !tbaa !0
+ %tmp = load float* @in, align 4
%vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0
%vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1
%mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00>
@@ -39,7 +39,7 @@ declare void @foo_uint32x2_t(<2 x i32>)
; CHECK: vmul
define void @t2() nounwind {
entry:
- %tmp = load float* @in, align 4, !tbaa !0
+ %tmp = load float* @in, align 4
%vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0
%vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1
%mul.i = fmul <2 x float> %vecinit2.i, <float 0x401B333340000000, float 0x401B333340000000>
@@ -53,7 +53,7 @@ entry:
; CHECK: vmul
define void @t3() nounwind {
entry:
- %tmp = load float* @in, align 4, !tbaa !0
+ %tmp = load float* @in, align 4
%vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0
%vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1
%mul.i = fmul <2 x float> %vecinit2.i, <float 0x4200000000000000, float 0x4200000000000000>
@@ -67,7 +67,7 @@ entry:
; CHECK-NOT: vmul
define void @t4() nounwind {
entry:
- %tmp = load float* @in, align 4, !tbaa !0
+ %tmp = load float* @in, align 4
%vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0
%vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1
%mul.i = fmul <2 x float> %vecinit2.i, <float 0x41F0000000000000, float 0x41F0000000000000>
@@ -81,7 +81,7 @@ entry:
; CHECK-NOT: vmul
define void @t5() nounwind {
entry:
- %tmp = load float* @in, align 4, !tbaa !0
+ %tmp = load float* @in, align 4
%vecinit.i = insertelement <4 x float> undef, float %tmp, i32 0
%vecinit2.i = insertelement <4 x float> %vecinit.i, float %tmp, i32 1
%vecinit4.i = insertelement <4 x float> %vecinit2.i, float %tmp, i32 2
@@ -93,7 +93,3 @@ entry:
}
declare void @foo_int32x4_t(<4 x i32>)
-
-!0 = metadata !{metadata !"float", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
diff --git a/test/CodeGen/ARM/vdiv_combine.ll b/test/CodeGen/ARM/vdiv_combine.ll
index 7fddbed1ed..e6f1338b85 100644
--- a/test/CodeGen/ARM/vdiv_combine.ll
+++ b/test/CodeGen/ARM/vdiv_combine.ll
@@ -11,7 +11,7 @@ declare void @foo_int32x4_t(<4 x i32>)
; CHECK-NOT: {{vdiv|vmul}}
define void @t1() nounwind {
entry:
- %tmp = load i32* @iin, align 4, !tbaa !3
+ %tmp = load i32* @iin, align 4
%vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0
%vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1
%vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float>
@@ -27,7 +27,7 @@ declare void @foo_float32x2_t(<2 x float>)
; CHECK-NOT: {{vdiv|vmul}}
define void @t2() nounwind {
entry:
- %tmp = load i32* @uin, align 4, !tbaa !3
+ %tmp = load i32* @uin, align 4
%vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0
%vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1
%vcvt.i = uitofp <2 x i32> %vecinit2.i to <2 x float>
@@ -41,7 +41,7 @@ entry:
; CHECK: {{vdiv|vmul}}
define void @t3() nounwind {
entry:
- %tmp = load i32* @iin, align 4, !tbaa !3
+ %tmp = load i32* @iin, align 4
%vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0
%vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1
%vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float>
@@ -55,7 +55,7 @@ entry:
; CHECK: {{vdiv|vmul}}
define void @t4() nounwind {
entry:
- %tmp = load i32* @iin, align 4, !tbaa !3
+ %tmp = load i32* @iin, align 4
%vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0
%vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1
%vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float>
@@ -69,7 +69,7 @@ entry:
; CHECK-NOT: {{vdiv|vmul}}
define void @t5() nounwind {
entry:
- %tmp = load i32* @iin, align 4, !tbaa !3
+ %tmp = load i32* @iin, align 4
%vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0
%vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1
%vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float>
@@ -83,7 +83,7 @@ entry:
; CHECK-NOT: {{vdiv|vmul}}
define void @t6() nounwind {
entry:
- %tmp = load i32* @iin, align 4, !tbaa !3
+ %tmp = load i32* @iin, align 4
%vecinit.i = insertelement <4 x i32> undef, i32 %tmp, i32 0
%vecinit2.i = insertelement <4 x i32> %vecinit.i, i32 %tmp, i32 1
%vecinit4.i = insertelement <4 x i32> %vecinit2.i, i32 %tmp, i32 2
@@ -95,8 +95,3 @@ entry:
}
declare void @foo_float32x4_t(<4 x float>)
-
-!0 = metadata !{metadata !"float", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
-!3 = metadata !{metadata !"int", metadata !1}
diff --git a/test/CodeGen/Generic/crash.ll b/test/CodeGen/Generic/crash.ll
index d889389b7c..d3fc20467a 100644
--- a/test/CodeGen/Generic/crash.ll
+++ b/test/CodeGen/Generic/crash.ll
@@ -51,7 +51,7 @@ for.body.i: ; preds = %for.body.i, %entry
func_74.exit.for.cond29.thread_crit_edge: ; preds = %for.body.i
%f13576.pre = getelementptr inbounds %struct.S0* undef, i64 0, i32 1
- store i8 0, i8* %f13576.pre, align 4, !tbaa !0
+ store i8 0, i8* %f13576.pre, align 4
br label %lbl_468
lbl_468: ; preds = %lbl_468, %func_74.exit.for.cond29.thread_crit_edge
@@ -63,6 +63,3 @@ lbl_468: ; preds = %lbl_468, %func_74.e
for.end74: ; preds = %lbl_468
ret void
}
-
-!0 = metadata !{metadata !"omnipotent char", metadata !1}
-!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
diff --git a/test/CodeGen/Hexagon/cmpb_pred.ll b/test/CodeGen/Hexagon/cmpb_pred.ll
index 1e6144701f..0960da1fa0 100644
--- a/test/CodeGen/Hexagon/cmpb_pred.ll
+++ b/test/CodeGen/Hexagon/cmpb_pred.ll
@@ -16,7 +16,7 @@ entry:
define i32 @Func_3b(i32) nounwind readonly {
entry:
; CHECK-NOT: mux
- %1 = load i8* @Enum_global, align 1, !tbaa !0
+ %1 = load i8* @Enum_global, align 1
%2 = trunc i32 %0 to i8
%cmp = icmp ne i8 %1, %2
%selv = zext i1 %cmp to i32
@@ -35,7 +35,7 @@ entry:
define i32 @Func_3d(i32) nounwind readonly {
entry:
; CHECK-NOT: mux
- %1 = load i8* @Enum_global, align 1, !tbaa !0
+ %1 = load i8* @Enum_global, align 1
%2 = trunc i32 %0 to i8
%cmp = icmp eq i8 %1, %2
%selv = zext i1 %cmp to i32
@@ -45,7 +45,7 @@ entry:
define i32 @Func_3e(i32) nounwind readonly {
entry:
; CHECK-NOT: mux
- %1 = load i8* @Enum_global, align 1, !tbaa !0
+ %1 = load i8* @Enum_global, align 1
%2 = trunc i32 %0 to i8
%cmp = icmp eq i8 %1, %2
%selv = zext i1 %cmp to i32
@@ -87,6 +87,3 @@ entry:
%selv = zext i1 %cmp to i32
ret i32 %selv
}
-
-!0 = metadata !{metadata !"omnipotent char", metadata !1}
-!1 = metadata !{metadata !"Simple C/C++ TBAA"}
diff --git a/test/CodeGen/Hexagon/hwloop-const.ll b/test/CodeGen/Hexagon/hwloop-const.ll
index a621c58c63..8204ddea34 100644
--- a/test/CodeGen/Hexagon/hwloop-const.ll
+++ b/test/CodeGen/Hexagon/hwloop-const.ll
@@ -15,9 +15,9 @@ entry:
for.body: ; preds = %for.body, %entry
%i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds [25000 x i32]* @b, i32 0, i32 %i.02
- store i32 %i.02, i32* %arrayidx, align 4, !tbaa !0
+ store i32 %i.02, i32* %arrayidx, align 4
%arrayidx1 = getelementptr inbounds [25000 x i32]* @a, i32 0, i32 %i.02
- store i32 %i.02, i32* %arrayidx1, align 4, !tbaa !0
+ store i32 %i.02, i32* %arrayidx1, align 4
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, 25000
br i1 %exitcond, label %for.end, label %for.body
@@ -25,7 +25,3 @@ for.body: ; preds = %for.body, %entry
for.end: ; preds = %for.body
ret i32 0
}
-
-!0 = metadata !{metadata !"int", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA"}
diff --git a/test/CodeGen/Hexagon/hwloop-dbg.ll b/test/CodeGen/Hexagon/hwloop-dbg.ll
index c2e8153b7d..17fe7b982d 100644
--- a/test/CodeGen/Hexagon/hwloop-dbg.ll
+++ b/test/CodeGen/Hexagon/hwloop-dbg.ll
@@ -19,8 +19,8 @@ for.body: ; preds = %for.body, %entry
%b.addr.01 = phi i32* [ %b, %entry ], [ %incdec.ptr, %for.body ]
%incdec.ptr = getelementptr inbounds i32* %b.addr.01, i32 1, !dbg !21
tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14), !dbg !21
- %0 = load i32* %b.addr.01, align 4, !dbg !21, !tbaa !23
- store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21, !tbaa !23
+ %0 = load i32* %b.addr.01, align 4, !dbg !21
+ store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21
%inc = add nsw i32 %i.02, 1, !dbg !26
tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15), !dbg !26
%exitcond = icmp eq i32 %inc, 10, !dbg !19
@@ -57,8 +57,5 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!20 = metadata !{i32 786443, metadata !16, i32 3, i32 3, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c]
!21 = metadata !{i32 4, i32 5, metadata !22, null}
!22 = metadata !{i32 786443, metadata !20, i32 3, i32 28, metadata !6, i32 2} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c]
-!23 = metadata !{metadata !"int", metadata !24}
-!24 = metadata !{metadata !"omnipotent char", metadata !25}
-!25 = metadata !{metadata !"Simple C/C++ TBAA"}
!26 = metadata !{i32 3, i32 23, metadata !20, null}
!27 = metadata !{i32 6, i32 1, metadata !16, null}
diff --git a/test/CodeGen/Hexagon/memops2.ll b/test/CodeGen/Hexagon/memops2.ll
index b1b25445c0..d6d1a50bce 100644
--- a/test/CodeGen/Hexagon/memops2.ll
+++ b/test/CodeGen/Hexagon/memops2.ll
@@ -6,11 +6,11 @@ define void @f(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}#1
%add.ptr = getelementptr inbounds i16* %p, i32 10
- %0 = load i16* %add.ptr, align 2, !tbaa !0
+ %0 = load i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%sub = add nsw i32 %conv2, 65535
%conv1 = trunc i32 %sub to i16
- store i16 %conv1, i16* %add.ptr, align 2, !tbaa !0
+ store i16 %conv1, i16* %add.ptr, align 2
ret void
}
@@ -19,14 +19,10 @@ entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}#1
%add.ptr.sum = add i32 %i, 10
%add.ptr1 = getelementptr inbounds i16* %p, i32 %add.ptr.sum
- %0 = load i16* %add.ptr1, align 2, !tbaa !0
+ %0 = load i16* %add.ptr1, align 2
%conv3 = zext i16 %0 to i32
%sub = add nsw i32 %conv3, 65535
%conv2 = trunc i32 %sub to i16
- store i16 %conv2, i16* %add.ptr1, align 2, !tbaa !0
+ store i16 %conv2, i16* %add.ptr1, align 2
ret void
}
-
-!0 = metadata !{metadata !"short", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA"}
diff --git a/test/CodeGen/Hexagon/memops3.ll b/test/CodeGen/Hexagon/memops3.ll
index 5b8bd6c87b..d9e4e8f537 100644
--- a/test/CodeGen/Hexagon/memops3.ll
+++ b/test/CodeGen/Hexagon/memops3.ll
@@ -6,11 +6,11 @@ define void @f(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}#1
%add.ptr = getelementptr inbounds i8* %p, i32 10
- %0 = load i8* %add.ptr, align 1, !tbaa !0
+ %0 = load i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%sub = add nsw i32 %conv, 255
%conv1 = trunc i32 %sub to i8
- store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0
+ store i8 %conv1, i8* %add.ptr, align 1
ret void
}
@@ -19,13 +19,10 @@ entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}#1
%add.ptr.sum = add i32 %i, 10
%add.ptr1 = getelementptr inbounds i8* %p, i32 %add.ptr.sum
- %0 = load i8* %add.ptr1, align 1, !tbaa !0
+ %0 = load i8* %add.ptr1, align 1
%conv = zext i8 %0 to i32
%sub = add nsw i32 %conv, 255
%conv2 = trunc i32 %sub to i8
- store i8 %conv2, i8* %add.ptr1, align 1, !tbaa !0
+ store i8 %conv2, i8* %add.ptr1, align 1
ret void
}
-
-!0 = metadata !{metadata !"omnipotent char", metadata !1}
-!1 = metadata !{metadata !"Simple C/C++ TBAA"}
diff --git a/test/CodeGen/Hexagon/remove_lsr.ll b/test/CodeGen/Hexagon/remove_lsr.ll
index 79b5f4ae7c..3128dbb8b2 100644
--- a/test/CodeGen/Hexagon/remove_lsr.ll
+++ b/test/CodeGen/Hexagon/remove_lsr.ll
@@ -46,17 +46,17 @@ for.body: ; preds = %for.body, %entry
%1 = trunc i64 %val.021 to i32
%2 = trunc i64 %0 to i32
%3 = tail call i32 @llvm.hexagon.C2.mux(i32 %conv3, i32 %1, i32 %2)
- store i32 %3, i32* %lsr.iv3335, align 4, !tbaa !0
+ store i32 %3, i32* %lsr.iv3335, align 4
%conv8 = sext i8 %predicate_1.023 to i32
%4 = lshr i64 %val.021, 32
%5 = trunc i64 %4 to i32
%6 = lshr i64 %0, 32
%7 = trunc i64 %6 to i32
%8 = tail call i32 @llvm.hexagon.C2.mux(i32 %conv8, i32 %5, i32 %7)
- store i32 %8, i32* %lsr.iv2931, align 4, !tbaa !0
+ store i32 %8, i32* %lsr.iv2931, align 4
%srcval = load i64* %lsr.iv27, align 8
- %9 = load i8* %lsr.iv40, align 1, !tbaa !1
- %10 = load i8* %lsr.iv37, align 1, !tbaa !1
+ %9 = load i8* %lsr.iv40, align 1
+ %10 = load i8* %lsr.iv37, align 1
%lftr.wideiv = trunc i32 %lsr.iv42 to i8
%exitcond = icmp eq i8 %lftr.wideiv, 32
%scevgep26 = getelementptr %union.vect64* %lsr.iv, i32 1
@@ -74,7 +74,3 @@ for.end: ; preds = %for.body
declare i64 @llvm.hexagon.A2.vsubhs(i64, i64) nounwind readnone
declare i32 @llvm.hexagon.C2.mux(i32, i32, i32) nounwind readnone
-
-!0 = metadata !{metadata !"long", metadata !1}
-!1 = metadata !{metadata !"omnipotent char", metadata !2}
-!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
diff --git a/test/CodeGen/Mips/alloca.ll b/test/CodeGen/Mips/alloca.ll
index d79ea9193d..fc7ef862a3 100644
--- a/test/CodeGen/Mips/alloca.ll
+++ b/test/CodeGen/Mips/alloca.ll
@@ -59,23 +59,23 @@ if.end: ; preds = %if.else, %if.then
; CHECK: lw $25, %call16(printf)
%.pre-phi = phi i32* [ %2, %if.else ], [ %.pre, %if.then ]
- %tmp7 = load i32* %0, align 4, !tbaa !0
+ %tmp7 = load i32* %0, align 4
%arrayidx9 = getelementptr inbounds i8* %tmp1, i32 4
%3 = bitcast i8* %arrayidx9 to i32*