diff options
| -rw-r--r-- | include/llvm/CodeGen/LiveIntervalAnalysis.h | 1 | ||||
| -rw-r--r-- | include/llvm/CodeGen/LiveIntervals.h | 1 | ||||
| -rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 18 | ||||
| -rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.h | 1 | ||||
| -rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 13 |
5 files changed, 32 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h index cecfbbadbd..8f5fd3a648 100644 --- a/include/llvm/CodeGen/LiveIntervalAnalysis.h +++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h @@ -38,6 +38,7 @@ namespace llvm { typedef std::pair<unsigned, unsigned> Range; typedef std::vector<Range> Ranges; unsigned reg; // the register of this interval + unsigned hint; float weight; // weight of this interval (number of uses // * 10^loopDepth) Ranges ranges; // the ranges this register is valid diff --git a/include/llvm/CodeGen/LiveIntervals.h b/include/llvm/CodeGen/LiveIntervals.h index cecfbbadbd..8f5fd3a648 100644 --- a/include/llvm/CodeGen/LiveIntervals.h +++ b/include/llvm/CodeGen/LiveIntervals.h @@ -38,6 +38,7 @@ namespace llvm { typedef std::pair<unsigned, unsigned> Range; typedef std::vector<Range> Ranges; unsigned reg; // the register of this interval + unsigned hint; float weight; // weight of this interval (number of uses // * 10^loopDepth) Ranges ranges; // the ranges this register is valid diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index b34a65bc64..4d0916046a 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -108,6 +108,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { // compute spill weights const LoopInfo& loopInfo = getAnalysis<LoopInfo>(); + const TargetInstrInfo& tii = tm_->getInstrInfo(); for (MbbIndex2MbbMap::iterator it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end(); @@ -130,6 +131,21 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { assert(r2iit != r2iMap_.end()); intervals_[r2iit->second].weight += pow(10.0F, loopDepth); } + + // add hints for coalescing + unsigned src, dst; + if (tii.isMoveInstr(*instr, src, dst)) { + if (src >= MRegisterInfo::FirstVirtualRegister) { + Reg2IntervalMap::iterator r2iit = r2iMap_.find(src); + assert(r2iit != r2iMap_.end()); + intervals_[r2iit->second].hint = dst; + } + if (dst >= MRegisterInfo::FirstVirtualRegister) { + Reg2IntervalMap::iterator r2iit = r2iMap_.find(dst); + assert(r2iit != r2iMap_.end()); + intervals_[r2iit->second].hint = src; + } + } } } @@ -329,7 +345,7 @@ void LiveIntervals::computeIntervals() } LiveIntervals::Interval::Interval(unsigned r) - : reg(r), + : reg(r), hint(0), weight((r < MRegisterInfo::FirstVirtualRegister ? std::numeric_limits<float>::max() : 0.0F)) { diff --git a/lib/CodeGen/LiveIntervalAnalysis.h b/lib/CodeGen/LiveIntervalAnalysis.h index cecfbbadbd..8f5fd3a648 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.h +++ b/lib/CodeGen/LiveIntervalAnalysis.h @@ -38,6 +38,7 @@ namespace llvm { typedef std::pair<unsigned, unsigned> Range; typedef std::vector<Range> Ranges; unsigned reg; // the register of this interval + unsigned hint; float weight; // weight of this interval (number of uses // * 10^loopDepth) Ranges ranges; // the ranges this register is valid diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index a804e1aa86..e2c1a18b44 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -615,8 +615,19 @@ bool RA::physRegAvailable(unsigned physReg) unsigned RA::getFreePhysReg(Intervals::const_iterator cur) { DEBUG(std::cerr << "\t\tgetting free physical register: "); - const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg); + + if (unsigned reg = cur->hint) { + if (reg >= MRegisterInfo::FirstVirtualRegister && + v2pMap_.find(reg) != v2pMap_.end()) + reg = v2pMap_[reg]; + if (reg && reg < MRegisterInfo::FirstVirtualRegister && + mri_->getRegClass(reg) == rc && !regUse_[reg]) { + DEBUG(std::cerr << mri_->getName(reg) << '\n'); + return reg; + } + } + for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_); i != rc->allocation_order_end(*mf_); ++i) { unsigned reg = *i; |