diff options
67 files changed, 165 insertions, 120 deletions
diff --git a/Makefile.rules b/Makefile.rules index 2acadd8400..46a3f1bdb9 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -1720,35 +1720,15 @@ TDFiles := $(strip $(wildcard $(PROJ_SRC_DIR)/*.td) \ # All of these files depend on tblgen and the .td files. $(INCTMPFiles) : $(TBLGEN) $(TDFiles) -$(TARGET:%=$(ObjDir)/%GenRegisterNames.inc.tmp): \ -$(ObjDir)/%GenRegisterNames.inc.tmp : %.td $(ObjDir)/.dir - $(Echo) "Building $(<F) register names with tblgen" - $(Verb) $(TableGen) -gen-register-enums -o $(call SYSPATH, $@) $< - -$(TARGET:%=$(ObjDir)/%GenRegisterDesc.inc.tmp): \ -$(ObjDir)/%GenRegisterDesc.inc.tmp : %.td $(ObjDir)/.dir - $(Echo) "Building $(<F) register descriptions with tblgen" - $(Verb) $(TableGen) -gen-register-desc -o $(call SYSPATH, $@) $< - -$(TARGET:%=$(ObjDir)/%GenRegisterInfo.h.inc.tmp): \ -$(ObjDir)/%GenRegisterInfo.h.inc.tmp : %.td $(ObjDir)/.dir - $(Echo) "Building $(<F) register information header with tblgen" - $(Verb) $(TableGen) -gen-register-info-header -o $(call SYSPATH, $@) $< - $(TARGET:%=$(ObjDir)/%GenRegisterInfo.inc.tmp): \ $(ObjDir)/%GenRegisterInfo.inc.tmp : %.td $(ObjDir)/.dir $(Echo) "Building $(<F) register info implementation with tblgen" $(Verb) $(TableGen) -gen-register-info -o $(call SYSPATH, $@) $< -$(TARGET:%=$(ObjDir)/%GenInstrNames.inc.tmp): \ -$(ObjDir)/%GenInstrNames.inc.tmp : %.td $(ObjDir)/.dir - $(Echo) "Building $(<F) instruction names with tblgen" - $(Verb) $(TableGen) -gen-instr-enums -o $(call SYSPATH, $@) $< - $(TARGET:%=$(ObjDir)/%GenInstrInfo.inc.tmp): \ $(ObjDir)/%GenInstrInfo.inc.tmp : %.td $(ObjDir)/.dir $(Echo) "Building $(<F) instruction information with tblgen" - $(Verb) $(TableGen) -gen-instr-desc -o $(call SYSPATH, $@) $< + $(Verb) $(TableGen) -gen-instr-info -o $(call SYSPATH, $@) $< $(TARGET:%=$(ObjDir)/%GenAsmWriter.inc.tmp): \ $(ObjDir)/%GenAsmWriter.inc.tmp : %.td $(ObjDir)/.dir diff --git a/include/llvm/MC/MCInstrDesc.h b/include/llvm/MC/MCInstrDesc.h index 5d0779a12a..17d5fdc5d3 100644 --- a/include/llvm/MC/MCInstrDesc.h +++ b/include/llvm/MC/MCInstrDesc.h @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file defines the McOperandInfo and McInstrDesc classes, which +// This file defines the MCOperandInfo and MCInstrDesc classes, which // are used to describe target instructions and their operands. // //===----------------------------------------------------------------------===// diff --git a/lib/Target/ARM/ARMBaseInfo.h b/lib/Target/ARM/ARMBaseInfo.h index 91e9fd1f9b..4c9ecdfdaf 100644 --- a/lib/Target/ARM/ARMBaseInfo.h +++ b/lib/Target/ARM/ARMBaseInfo.h @@ -30,7 +30,8 @@ // Defines symbolic names for the ARM instructions. // -#include "ARMGenInstrNames.inc" +#define GET_INSTRINFO_ENUM +#include "ARMGenInstrInfo.inc" namespace llvm { diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index c619e8f8c6..31ea95a9ea 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -18,7 +18,6 @@ #include "ARMHazardRecognizer.h" #include "ARMMachineFunctionInfo.h" #include "ARMRegisterInfo.h" -#include "ARMGenInstrInfo.inc" #include "llvm/Constants.h" #include "llvm/Function.h" #include "llvm/GlobalValue.h" @@ -35,6 +34,10 @@ #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/ADT/STLExtras.h" + +#define GET_INSTRINFO_MC_DESC +#include "ARMGenInstrInfo.inc" + using namespace llvm; static cl::opt<bool> diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index 6f48d967f9..adcbf1806f 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -14,7 +14,6 @@ #include "ARMInstrInfo.h" #include "ARM.h" #include "ARMAddressingModes.h" -#include "ARMGenInstrInfo.inc" #include "ARMMachineFunctionInfo.h" #include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/LiveVariables.h" diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index 0a0ed3c741..b1d4f54024 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -1,8 +1,7 @@ set(LLVM_TARGET_DEFINITIONS ARM.td) tablegen(ARMGenRegisterInfo.inc -gen-register-info) -tablegen(ARMGenInstrNames.inc -gen-instr-enums) -tablegen(ARMGenInstrInfo.inc -gen-instr-desc) +tablegen(ARMGenInstrInfo.inc -gen-instr-info) tablegen(ARMGenCodeEmitter.inc -gen-emitter) tablegen(ARMGenMCCodeEmitter.inc -gen-emitter -mc-emitter) tablegen(ARMGenAsmWriter.inc -gen-asm-writer) diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index 851b2d0cf8..fe165b04b4 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -71,6 +71,7 @@ /// { ARM::CCRRegClassID, 0|(1<<MCOI::OptionalDef), 0 } /// /// And this maps to one MCOperand with the regsiter kind of ARM::CPSR. +#define GET_INSTRINFO_MC_DESC #include "ARMGenInstrInfo.inc" using namespace llvm; diff --git a/lib/Target/ARM/Makefile b/lib/Target/ARM/Makefile index 9ecbd6b1b1..6472c53d0d 100644 --- a/lib/Target/ARM/Makefile +++ b/lib/Target/ARM/Makefile @@ -12,8 +12,7 @@ LIBRARYNAME = LLVMARMCodeGen TARGET = ARM # Make sure that tblgen is run, first thing. -BUILT_SOURCES = ARMGenRegisterInfo.inc \ - ARMGenInstrNames.inc ARMGenInstrInfo.inc \ +BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \ ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \ ARMGenDAGISel.inc ARMGenSubtarget.inc \ ARMGenCodeEmitter.inc ARMGenCallingConv.inc \ diff --git a/lib/Target/ARM/Thumb1InstrInfo.cpp b/lib/Target/ARM/Thumb1InstrInfo.cpp index 3fbb43340c..b430ab3a6a 100644 --- a/lib/Target/ARM/Thumb1InstrInfo.cpp +++ b/lib/Target/ARM/Thumb1InstrInfo.cpp @@ -13,7 +13,6 @@ #include "Thumb1InstrInfo.h" #include "ARM.h" -#include "ARMGenInstrInfo.inc" #include "ARMMachineFunctionInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index 98151b96bf..26e75db02c 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -15,7 +15,6 @@ #include "ARM.h" #include "ARMConstantPoolValue.h" #include "ARMAddressingModes.h" -#include "ARMGenInstrInfo.inc" #include "ARMMachineFunctionInfo.h" #include "Thumb2InstrInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h" diff --git a/lib/Target/Alpha/Alpha.h b/lib/Target/Alpha/Alpha.h index 174d2613a9..435c95cd03 100644 --- a/lib/Target/Alpha/Alpha.h +++ b/lib/Target/Alpha/Alpha.h @@ -50,6 +50,7 @@ namespace llvm { // Defines symbolic names for the Alpha instructions. // -#include "AlphaGenInstrNames.inc" +#define GET_INSTRINFO_ENUM +#include "AlphaGenInstrInfo.inc" #endif diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 5a2f5610fd..589e2d959d 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -14,12 +14,14 @@ #include "Alpha.h" #include "AlphaInstrInfo.h" #include "AlphaMachineFunctionInfo.h" -#include "AlphaGenInstrInfo.inc" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/ErrorHandling.h" + +#define GET_INSTRINFO_MC_DESC +#include "AlphaGenInstrInfo.inc" using namespace llvm; AlphaInstrInfo::AlphaInstrInfo() diff --git a/lib/Target/Alpha/CMakeLists.txt b/lib/Target/Alpha/CMakeLists.txt index bcde447443..1f9edcf48a 100644 --- a/lib/Target/Alpha/CMakeLists.txt +++ b/lib/Target/Alpha/CMakeLists.txt @@ -1,8 +1,7 @@ set(LLVM_TARGET_DEFINITIONS Alpha.td) tablegen(AlphaGenRegisterInfo.inc -gen-register-info) -tablegen(AlphaGenInstrNames.inc -gen-instr-enums) -tablegen(AlphaGenInstrInfo.inc -gen-instr-desc) +tablegen(AlphaGenInstrInfo.inc -gen-instr-info) tablegen(AlphaGenAsmWriter.inc -gen-asm-writer) tablegen(AlphaGenDAGISel.inc -gen-dag-isel) tablegen(AlphaGenCallingConv.inc -gen-callingconv) diff --git a/lib/Target/Alpha/Makefile b/lib/Target/Alpha/Makefile index bd280a0e1b..40c4f903f3 100644 --- a/lib/Target/Alpha/Makefile +++ b/lib/Target/Alpha/Makefile @@ -12,8 +12,7 @@ LIBRARYNAME = LLVMAlphaCodeGen TARGET = Alpha # Make sure that tblgen is run, first thing. -BUILT_SOURCES = AlphaGenRegisterInfo.inc \ - AlphaGenInstrNames.inc AlphaGenInstrInfo.inc \ +BUILT_SOURCES = AlphaGenRegisterInfo.inc AlphaGenInstrInfo.inc \ AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \ AlphaGenCallingConv.inc AlphaGenSubtarget.inc diff --git a/lib/Target/Blackfin/Blackfin.h b/lib/Target/Blackfin/Blackfin.h index 3285c4f631..c3ee7e71fd 100644 --- a/lib/Target/Blackfin/Blackfin.h +++ b/lib/Target/Blackfin/Blackfin.h @@ -34,6 +34,7 @@ namespace llvm { #include "BlackfinGenRegisterInfo.inc" // Defines symbolic names for the Blackfin instructions. -#include "BlackfinGenInstrNames.inc" +#define GET_INSTRINFO_ENUM +#include "BlackfinGenInstrInfo.inc" #endif diff --git a/lib/Target/Blackfin/BlackfinInstrInfo.cpp b/lib/Target/Blackfin/BlackfinInstrInfo.cpp index 598cf2a68c..0b50a95f5e 100644 --- a/lib/Target/Blackfin/BlackfinInstrInfo.cpp +++ b/lib/Target/Blackfin/BlackfinInstrInfo.cpp @@ -19,6 +19,8 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/ErrorHandling.h" + +#define GET_INSTRINFO_MC_DESC #include "BlackfinGenInstrInfo.inc" using namespace llvm; diff --git a/lib/Target/Blackfin/CMakeLists.txt b/lib/Target/Blackfin/CMakeLists.txt index c59b5a311e..8fc63aa3dc 100644 --- a/lib/Target/Blackfin/CMakeLists.txt +++ b/lib/Target/Blackfin/CMakeLists.txt @@ -1,8 +1,7 @@ set(LLVM_TARGET_DEFINITIONS Blackfin.td) tablegen(BlackfinGenRegisterInfo.inc -gen-register-info) -tablegen(BlackfinGenInstrNames.inc -gen-instr-enums) -tablegen(BlackfinGenInstrInfo.inc -gen-instr-desc) +tablegen(BlackfinGenInstrInfo.inc -gen-instr-info) tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer) tablegen(BlackfinGenDAGISel.inc -gen-dag-isel) tablegen(BlackfinGenSubtarget.inc -gen-subtarget) diff --git a/lib/Target/Blackfin/Makefile b/lib/Target/Blackfin/Makefile index c05d27b4cc..a9edec78b5 100644 --- a/lib/Target/Blackfin/Makefile +++ b/lib/Target/Blackfin/Makefile @@ -12,8 +12,8 @@ LIBRARYNAME = LLVMBlackfinCodeGen TARGET = Blackfin # Make sure that tblgen is run, first thing. -BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrNames.inc \ - BlackfinGenInstrInfo.inc BlackfinGenAsmWriter.inc \ +BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrInfo.inc \ + BlackfinGenAsmWriter.inc \ BlackfinGenDAGISel.inc BlackfinGenSubtarget.inc \ BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc diff --git a/lib/Target/CellSPU/CMakeLists.txt b/lib/Target/CellSPU/CMakeLists.txt index 1cce2c1a6a..d769cb9316 100644 --- a/lib/Target/CellSPU/CMakeLists.txt +++ b/lib/Target/CellSPU/CMakeLists.txt @@ -1,10 +1,9 @@ set(LLVM_TARGET_DEFINITIONS SPU.td) -tablegen(SPUGenInstrNames.inc -gen-instr-enums) tablegen(SPUGenAsmWriter.inc -gen-asm-writer) tablegen(SPUGenCodeEmitter.inc -gen-emitter) tablegen(SPUGenRegisterInfo.inc -gen-register-info) -tablegen(SPUGenInstrInfo.inc -gen-instr-desc) +tablegen(SPUGenInstrInfo.inc -gen-instr-info) tablegen(SPUGenDAGISel.inc -gen-dag-isel) tablegen(SPUGenSubtarget.inc -gen-subtarget) tablegen(SPUGenCallingConv.inc -gen-callingconv) diff --git a/lib/Target/CellSPU/Makefile b/lib/Target/CellSPU/Makefile index 270bd6b8b3..5bb6f9cc58 100644 --- a/lib/Target/CellSPU/Makefile +++ b/lib/Target/CellSPU/Makefile @@ -10,9 +10,9 @@ LEVEL = ../../.. LIBRARYNAME = LLVMCellSPUCodeGen TARGET = SPU -BUILT_SOURCES = SPUGenInstrNames.inc SPUGenRegisterInfo.inc \ +BUILT_SOURCES = SPUGenInstrInfo.inc SPUGenRegisterInfo.inc \ SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \ - SPUGenInstrInfo.inc SPUGenDAGISel.inc \ + SPUGenDAGISel.inc \ SPUGenSubtarget.inc SPUGenCallingConv.inc DIRS = TargetInfo diff --git a/lib/Target/CellSPU/SPU.h b/lib/Target/CellSPU/SPU.h index 72f84300b2..5c81c9a77a 100644 --- a/lib/Target/CellSPU/SPU.h +++ b/lib/Target/CellSPU/SPU.h @@ -30,6 +30,7 @@ namespace llvm { // Defines symbolic names for the SPU instructions. // -#include "SPUGenInstrNames.inc" +#define GET_INSTRINFO_ENUM +#include "SPUGenInstrInfo.inc" #endif /* LLVM_TARGET_IBMCELLSPU_H */ diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index 080434d667..1107cff9da 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -15,7 +15,6 @@ #include "SPUInstrInfo.h" #include "SPUInstrBuilder.h" #include "SPUTargetMachine.h" -#include "SPUGenInstrInfo.inc" #include "SPUHazardRecognizers.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/Debug.h" @@ -23,6 +22,9 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/MC/MCContext.h" +#define GET_INSTRINFO_MC_DESC +#include "SPUGenInstrInfo.inc" + using namespace llvm; namespace { diff --git a/lib/Target/MBlaze/CMakeLists.txt b/lib/Target/MBlaze/CMakeLists.txt index 498edd46fb..2aa984789d 100644 --- a/lib/Target/MBlaze/CMakeLists.txt +++ b/lib/Target/MBlaze/CMakeLists.txt @@ -1,8 +1,7 @@ set(LLVM_TARGET_DEFINITIONS MBlaze.td) tablegen(MBlazeGenRegisterInfo.inc -gen-register-info) -tablegen(MBlazeGenInstrNames.inc -gen-instr-enums) -tablegen(MBlazeGenInstrInfo.inc -gen-instr-desc) +tablegen(MBlazeGenInstrInfo.inc -gen-instr-info) tablegen(MBlazeGenCodeEmitter.inc -gen-emitter) tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer) tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher) diff --git a/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp b/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp index 060a87b7c6..14642742e3 100644 --- a/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp +++ b/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp @@ -27,6 +27,7 @@ // #include "MBlazeGenDecoderTables.inc" // #include "MBlazeGenRegisterNames.inc" +#define GET_INSTRINFO_MC_DESC #include "MBlazeGenInstrInfo.inc" #include "MBlazeGenEDInfo.inc" diff --git a/lib/Target/MBlaze/MBlaze.h b/lib/Target/MBlaze/MBlaze.h index c6181f70bc..e9aff5b96b 100644 --- a/lib/Target/MBlaze/MBlaze.h +++ b/lib/Target/MBlaze/MBlaze.h @@ -43,6 +43,7 @@ namespace llvm { #include "MBlazeGenRegisterInfo.inc" // Defines symbolic names for the MBlaze instructions. -#include "MBlazeGenInstrNames.inc" +#define GET_INSTRINFO_ENUM +#include "MBlazeGenInstrInfo.inc" #endif diff --git a/lib/Target/MBlaze/MBlazeInstrInfo.cpp b/lib/Target/MBlaze/MBlazeInstrInfo.cpp index 794ebedf1e..adc81ff444 100644 --- a/lib/Target/MBlaze/MBlazeInstrInfo.cpp +++ b/lib/Target/MBlaze/MBlazeInstrInfo.cpp @@ -20,6 +20,8 @@ #include "llvm/CodeGen/ScoreboardHazardRecognizer.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" + +#define GET_INSTRINFO_MC_DESC #include "MBlazeGenInstrInfo.inc" using namespace llvm; diff --git a/lib/Target/MBlaze/Makefile b/lib/Target/MBlaze/Makefile index 010885f04b..171548f47b 100644 --- a/lib/Target/MBlaze/Makefile +++ b/lib/Target/MBlaze/Makefile @@ -11,8 +11,8 @@ LIBRARYNAME = LLVMMBlazeCodeGen TARGET = MBlaze # Make sure that tblgen is run, first thing. -BUILT_SOURCES = MBlazeGenRegisterInfo.inc MBlazeGenInstrNames.inc \ - MBlazeGenInstrInfo.inc MBlazeGenAsmWriter.inc \ +BUILT_SOURCES = MBlazeGenRegisterInfo.inc MBlazeGenInstrInfo.inc \ + MBlazeGenAsmWriter.inc \ MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \ MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \ MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc \ diff --git a/lib/Target/MSP430/CMakeLists.txt b/lib/Target/MSP430/CMakeLists.txt index bf58fd2e80..613b259196 100644 --- a/lib/Target/MSP430/CMakeLists.txt +++ b/lib/Target/MSP430/CMakeLists.txt @@ -1,8 +1,7 @@ set(LLVM_TARGET_DEFINITIONS MSP430.td) tablegen(MSP430GenRegisterInfo.inc -gen-register-info) -tablegen(MSP430GenInstrNames.inc -gen-instr-enums) -tablegen(MSP430GenInstrInfo.inc -gen-instr-desc) +tablegen(MSP430GenInstrInfo.inc -gen-instr-info) tablegen(MSP430GenAsmWriter.inc -gen-asm-writer) tablegen(MSP430GenDAGISel.inc -gen-dag-isel) tablegen(MSP430GenCallingConv.inc -gen-callingconv) diff --git a/lib/Target/MSP430/MSP430.h b/lib/Target/MSP430/MSP430.h index 2dabe7c0d3..854d4e457c 100644 --- a/lib/Target/MSP430/MSP430.h +++ b/lib/Target/MSP430/MSP430.h @@ -51,6 +51,7 @@ namespace llvm { #include "MSP430GenRegisterInfo.inc" // Defines symbolic names for the MSP430 instructions. -#include "MSP430GenInstrNames.inc" +#define GET_INSTRINFO_ENUM +#include "MSP430GenInstrInfo.inc" #endif diff --git a/lib/Target/MSP430/MSP430InstrInfo.cpp b/lib/Target/MSP430/MSP430InstrInfo.cpp index 8ea84906bf..b883f46dc6 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.cpp +++ b/lib/Target/MSP430/MSP430InstrInfo.cpp @@ -15,7 +15,6 @@ #include "MSP430InstrInfo.h" #include "MSP430MachineFunctionInfo.h" #include "MSP430TargetMachine.h" -#include "MSP430GenInstrInfo.inc" #include "llvm/Function.h" #include "llvm/CodeGen/MachineFrameInfo.h" |