diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 | ||||
| -rw-r--r-- | test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll | 27 |
2 files changed, 33 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 33c8d1a36f..8a4a1b1726 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1882,10 +1882,15 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, isa<ConstantSDNode>(Op0.getOperand(1)) && cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) { // If this is (X&1) == / != 1, normalize it to (X&1) != / == 0. - if (Op0.getValueType() != VT) + if (Op0.getValueType().bitsGT(VT)) Op0 = DAG.getNode(ISD::AND, dl, VT, DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)), DAG.getConstant(1, VT)); + else if (Op0.getValueType().bitsLT(VT)) + Op0 = DAG.getNode(ISD::AND, dl, VT, + DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)), + DAG.getConstant(1, VT)); + return DAG.getSetCC(dl, VT, Op0, DAG.getConstant(0, Op0.getValueType()), Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ); diff --git a/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll b/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll new file mode 100644 index 0000000000..9910037703 --- /dev/null +++ b/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll @@ -0,0 +1,27 @@ +; RUN: llc < %s +; PR7001 + +target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" +target triple = "msp430-elf" + +define i16 @main() nounwind { +entry: + br label %while.cond + +while.cond: ; preds = %while.body, %entry + br i1 undef, label %land.rhs, label %land.end + +land.rhs: ; preds = %while.cond + br label %land.end + +land.end: ; preds = %land.rhs, %while.cond + %0 = phi i1 [ false, %while.cond ], [ undef, %land.rhs ] ; <i1> [#uses=1] + br i1 %0, label %while.body, label %while.end + +while.body: ; preds = %land.end + %tmp4 = load i16* undef ; <i16> [#uses=0] + br label %while.cond + +while.end: ; preds = %land.end + ret i16 undef +} |