aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--lib/Target/Alpha/AlphaISelPattern.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 1cb07f1e6b..6cba016e68 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1819,6 +1819,7 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
Tmp2 = SelectExpr(N.getOperand(1));
BuildMI(BB, DestType == MVT::f64 ? Alpha::DIVT : Alpha::DIVS, 2, Result)
.addReg(Tmp1).addReg(Tmp2);
+ return Result;
} else {
ConstantSDNode* CSD;
//check if we can convert into a shift!