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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-23 02:10:46 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-23 02:10:46 +0000 |
| commit | ec6906ba47d6d32cc817e85eddb87b320d6ae18c (patch) | |
| tree | 838fc08e4513b0a5f6846a13e69f179902a09763 /utils/TableGen | |
| parent | dd9dd6f857604abdeb5213648ffe50c10ccc59b9 (diff) | |
Properly model the latency of register defs which are 1) function returns or
2) live-outs.
Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117193 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
0 files changed, 0 insertions, 0 deletions