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authorChris Lattner <sabre@nondot.org>2005-10-23 05:47:52 +0000
committerChris Lattner <sabre@nondot.org>2005-10-23 05:47:52 +0000
commit2dc74dd831c611895bf5ac66521b4d944b15cc0b (patch)
treedc8acd337cb7dce9bb2e2e6c9431daac38e9a9d5 /utils/TableGen/TableGen.cpp
parentba76c21858bac5fd953d4dbe2f0624d8e884c7b5 (diff)
Remove the obsolete instr selector emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23894 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/TableGen.cpp')
-rw-r--r--utils/TableGen/TableGen.cpp8
1 files changed, 1 insertions, 7 deletions
diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index d356e57912..5d946c20f9 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -23,7 +23,6 @@
#include "RegisterInfoEmitter.h"
#include "InstrInfoEmitter.h"
#include "AsmWriterEmitter.h"
-#include "InstrSelectorEmitter.h"
#include "DAGISelEmitter.h"
#include "SubtargetEmitter.h"
#include <algorithm>
@@ -35,7 +34,7 @@ enum ActionType {
PrintRecords,
GenEmitter,
GenRegisterEnums, GenRegister, GenRegisterHeader,
- GenInstrEnums, GenInstrs, GenAsmWriter, GenInstrSelector,
+ GenInstrEnums, GenInstrs, GenAsmWriter,
GenDAGISel,
GenSubtarget,
PrintEnums,
@@ -61,8 +60,6 @@ namespace {
"Generate instruction descriptions"),
clEnumValN(GenAsmWriter, "gen-asm-writer",
"Generate assembly writer"),
- clEnumValN(GenInstrSelector, "gen-instr-selector",
- "Generate an instruction selector"),
clEnumValN(GenDAGISel, "gen-dag-isel",
"Generate a DAG instruction selector"),
clEnumValN(GenSubtarget, "gen-subtarget",
@@ -470,9 +467,6 @@ int main(int argc, char **argv) {
AsmWriterEmitter(Records).run(*Out);
break;
- case GenInstrSelector:
- InstrSelectorEmitter(Records).run(*Out);
- break;
case GenDAGISel:
DAGISelEmitter(Records).run(*Out);
break;