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| author | Evan Cheng <evan.cheng@apple.com> | 2011-03-15 05:09:26 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-03-15 05:09:26 +0000 |
| commit | 0f040a258ff6a2372fc232212b5e4189e8e7185d (patch) | |
| tree | 0e53a4efd96b8a1ffe81e53b5c9961cdcfe9407e /utils/TableGen/InstrInfoEmitter.cpp | |
| parent | b1a6eab655adce4f84a15afa9092e814b9aaabda (diff) | |
- Add "Bitcast" target instruction property for instructions which perform
nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127667 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/InstrInfoEmitter.cpp')
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 2b684bede3..67cce0e55f 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -272,6 +272,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isIndirectBranch) OS << "|(1<<TID::IndirectBranch)"; if (Inst.isCompare) OS << "|(1<<TID::Compare)"; if (Inst.isMoveImm) OS << "|(1<<TID::MoveImm)"; + if (Inst.isBitcast) OS << "|(1<<TID::Bitcast)"; if (Inst.isBarrier) OS << "|(1<<TID::Barrier)"; if (Inst.hasDelaySlot) OS << "|(1<<TID::DelaySlot)"; if (Inst.isCall) OS << "|(1<<TID::Call)"; |