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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-29 22:28:37 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-29 22:28:37 +0000 |
commit | 29f018cee616e4082e5005bc9adee4dc777e621c (patch) | |
tree | 3f7376b6ee4a80b2cc35be9c586c5b20acbb3fd1 /utils/TableGen/DAGISelMatcherGen.cpp | |
parent | 27e0666725c6558574cb7a55f8c91e7532e09548 (diff) |
Switch to ArrayRef<CodeGenRegisterClass*>.
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140816 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/DAGISelMatcherGen.cpp')
-rw-r--r-- | utils/TableGen/DAGISelMatcherGen.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/utils/TableGen/DAGISelMatcherGen.cpp b/utils/TableGen/DAGISelMatcherGen.cpp index c5897c72d3..85a4266a70 100644 --- a/utils/TableGen/DAGISelMatcherGen.cpp +++ b/utils/TableGen/DAGISelMatcherGen.cpp @@ -26,10 +26,10 @@ static MVT::SimpleValueType getRegisterValueType(Record *R, bool FoundRC = false; MVT::SimpleValueType VT = MVT::Other; const CodeGenRegister *Reg = T.getRegBank().getReg(R); - const std::vector<CodeGenRegisterClass> &RCs = T.getRegisterClasses(); + ArrayRef<CodeGenRegisterClass*> RCs = T.getRegBank().getRegClasses(); for (unsigned rc = 0, e = RCs.size(); rc != e; ++rc) { - const CodeGenRegisterClass &RC = RCs[rc]; + const CodeGenRegisterClass &RC = *RCs[rc]; if (!RC.contains(Reg)) continue; |