aboutsummaryrefslogtreecommitdiff
path: root/utils/TableGen/CodeGenTarget.cpp
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-11-15 23:19:15 +0000
committerJim Grosbach <grosbach@apple.com>2011-11-15 23:19:15 +0000
commite43862b6a6130ec29ee4e9e6c6c30b5607c9a728 (patch)
tree33c0b81c6656718548bcfd552a49c38bb481f2e6 /utils/TableGen/CodeGenTarget.cpp
parent6ac5b165d471fa1d1e6a266c4566a5605c38ba9a (diff)
ARM assembly parsing for register range syntax for VLD/VST register lists.
For example, vld1.f64 {d2-d5}, [r2,:128]! Should be equivalent to: vld1.f64 {d2,d3,d4,d5}, [r2,:128]! It's not documented syntax in the ARM ARM, but it is consistent with what's accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to support. rdar://10451128 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
0 files changed, 0 insertions, 0 deletions