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| author | Nate Begeman <natebegeman@mac.com> | 2005-10-12 20:40:40 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-10-12 20:40:40 +0000 |
| commit | 3df4d525c58d5db878eaadcfdcffbbfca96dd6a2 (patch) | |
| tree | 3b04ff3f93d6c0f634990c6cdc4b36d1cc4b0628 /utils/TableGen/CodeGenTarget.cpp | |
| parent | fab66f69009857f77bad1e9cb9f41733c04e011f (diff) | |
More cool stuff for the dag combiner. We can now finally handle things
like turning:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
into
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23703 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
0 files changed, 0 insertions, 0 deletions