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authorOwen Anderson <resistor@mac.com>2007-11-12 07:39:39 +0000
committerOwen Anderson <resistor@mac.com>2007-11-12 07:39:39 +0000
commit20ab29068d8a8ec31f26f022634f1e0bc4b1da56 (patch)
tree075ab2b15d357226cd3cefa2ca5c9540bdeb3dc8 /utils/TableGen/CodeGenTarget.cpp
parentf2fbca68f868122d6df0bfc9952b4e4c3dfb60b7 (diff)
Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
-rw-r--r--utils/TableGen/CodeGenTarget.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index ea96cf4bd2..4de05b2f83 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -379,6 +379,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
isReturn = R->getValueAsBit("isReturn");
isBranch = R->getValueAsBit("isBranch");
+ isIndirectBranch = R->getValueAsBit("isIndirectBranch");
isBarrier = R->getValueAsBit("isBarrier");
isCall = R->getValueAsBit("isCall");
isLoad = R->getValueAsBit("isLoad");