diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2005-12-04 08:18:16 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2005-12-04 08:18:16 +0000 |
| commit | 1c3d19eb15b7109f75727bac84c65fcfecb65e51 (patch) | |
| tree | 106873bf0efc68f02cfd1103b582a919d99aa318 /utils/TableGen/CodeGenTarget.cpp | |
| parent | f8ac8149578c0c9b96b2ab61ac8eef5d67c1a459 (diff) | |
* Commit the fix (by Chris) for a tblgen type inferencing bug.
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24587 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 51aad4fd3b..fceb61f44c 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -268,6 +268,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isTerminator = R->getValueAsBit("isTerminator"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter"); + hasCtrlDep = R->getValueAsBit("hasCtrlDep"); hasVariableNumberOfOperands = false; DagInit *DI; |