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| author | Sean Callanan <scallanan@apple.com> | 2011-03-15 01:23:15 +0000 |
|---|---|---|
| committer | Sean Callanan <scallanan@apple.com> | 2011-03-15 01:23:15 +0000 |
| commit | a21e2eae3def2fe39caed861dcb73c76c715569b (patch) | |
| tree | 33aec5978f0773fb9c409aa2ade730b0291700c4 /utils/TableGen/CodeGenInstruction.cpp | |
| parent | 4dbe200b2d3da0dfd1c788c9650b8b8075c241aa (diff) | |
X86 table-generator and disassembler support for the AVX
instruction set. This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures. Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenInstruction.cpp')
0 files changed, 0 insertions, 0 deletions