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author | Chris Lattner <sabre@nondot.org> | 2005-08-19 01:04:33 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-08-19 01:04:33 +0000 |
commit | fcd60a010b8da81b5b3528636fca78ebe4288c75 (patch) | |
tree | 7bdfff824b82d7802679b406c8b164ca83457688 /utils/TableGen/CodeEmitterGen.cpp | |
parent | ca6aa2f70ca1325d8cc4af3d6a7d99ab693e5456 (diff) |
The code emitter generator only supports targets with 32-bit instruction
words. There is no way for one of these targets to have a > 32-bit immediate!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeEmitterGen.cpp')
-rw-r--r-- | utils/TableGen/CodeEmitterGen.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index 6365880124..d8f8154806 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -197,7 +197,7 @@ void CodeEmitterGen::run(std::ostream &o) { // this is not an operand!! if (beginBitInInst != -1) { o << " // op" << op << ": " << Vals[i].getName() << "\n" - << " int64_t op" << op + << " int op" << op <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n"; //<< " MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n"; OpOrder[Vals[i].getName()] = op++; |