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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-30 21:46:58 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-30 21:46:58 +0000 |
commit | 9cda1be0aa5e9e70ae493ef6944a8c202c1c70e6 (patch) | |
tree | 886e4eafdbb8bc44151cfaf1f60ed627b5b7a90d /test/CodeGen/X86/inline-asm.ll | |
parent | ff09e56cda85c1740ac1689018dfe0d3cf49ae6c (diff) |
Prioritize smaller register classes for urgent evictions.
It helps compile exotic inline asm. In the test case, normal GR32
virtual registers use up eax-edx so the final GR32_ABCD live range has
no registers left. Since all the live ranges were tiny, we had no way of
prioritizing the smaller register class.
This patch allows tiny unspillable live ranges to be evicted by tiny
unspillable live ranges from a smaller register class.
<rdar://problem/11542429>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157715 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/inline-asm.ll')
-rw-r--r-- | test/CodeGen/X86/inline-asm.ll | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll index eef6c2f377..e6eb9efd8c 100644 --- a/test/CodeGen/X86/inline-asm.ll +++ b/test/CodeGen/X86/inline-asm.ll @@ -43,3 +43,12 @@ entry: %0 = tail call i8 asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %p, i1 %desired) nounwind ret void } + +; <rdar://problem/11542429> +; The constrained GR32_ABCD register class of the 'q' constraint requires +; special handling after the preceding outputs used up eax-edx. +define void @constrain_abcd(i8* %h) nounwind ssp { +entry: + %0 = call { i32, i32, i32, i32, i32 } asm sideeffect "", "=&r,=&r,=&r,=&r,=&q,r,~{ecx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %h) nounwind + ret void +} |