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authorHal Finkel <hfinkel@anl.gov>2012-06-08 15:38:23 +0000
committerHal Finkel <hfinkel@anl.gov>2012-06-08 15:38:23 +0000
commitdaa03ec60475a641bcc66799764977f79997ca45 (patch)
tree88764859180b5f2af3a95fd201eaddeba589fa61 /test/CodeGen/PowerPC/ctrloops.ll
parent99f823f94374917174f96a7689955b8463db6816 (diff)
Fix a bug in the new PPC CTR-Loops pass.
The code which tests for an induction operation cannot assume that any ADDI instruction will have a register operand because the operand could also be a frame index; for example: %vreg16<def> = ADDI8 <fi#0>, 0; G8RC:%vreg16 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158205 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/ctrloops.ll')
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