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authorDan Gohman <gohman@apple.com>2008-11-14 00:06:09 +0000
committerDan Gohman <gohman@apple.com>2008-11-14 00:06:09 +0000
commitf449bf36ef5cb8e23fa2b5bc43f8d54d2b48fa4e (patch)
tree0fc69dc10226d7b5d791fc51a780064e17255a20 /lib
parentc3c129fd8b74909cad75d88223e9b5b4dc16df20 (diff)
Initial support for carrying MachineInstrs in SUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59278 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp10
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp21
2 files changed, 27 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
index 2c40d97a7e..d60dd49357 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
@@ -684,6 +684,16 @@ MachineBasicBlock *ScheduleDAG::EmitSchedule() {
EmitNoop();
continue;
}
+
+ // For post-regalloc scheduling, we already have the instruction;
+ // just append it to the block.
+ if (!DAG) {
+ BB->push_back(SU->getInstr());
+ continue;
+ }
+
+ // For pre-regalloc scheduling, create instructions corresponding to the
+ // SDNode and any flagged SDNodes and append them to the block.
SmallVector<SDNode *, 4> FlaggedNodes;
for (SDNode *N = SU->getNode()->getFlaggedNode(); N; N = N->getFlaggedNode())
FlaggedNodes.push_back(N);
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
index 27746333e4..8ff50c1a3a 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
@@ -420,11 +420,24 @@ namespace llvm {
static void addCustomGraphFeatures(ScheduleDAG *G,
GraphWriter<ScheduleDAG*> &GW) {
+ // Draw a special "GraphRoot" node to indicate the root of the graph.
GW.emitSimpleNode(0, "plaintext=circle", "GraphRoot");
- const SDNode *N = G->DAG->getRoot().getNode();
- if (N && N->getNodeId() != -1)
- GW.emitEdge(0, -1, &G->SUnits[N->getNodeId()], -1,
- "color=blue,style=dashed");
+ if (G->DAG) {
+ // For an SDNode-based ScheduleDAG, point to the root of the ScheduleDAG.
+ const SDNode *N = G->DAG->getRoot().getNode();
+ if (N && N->getNodeId() != -1)
+ GW.emitEdge(0, -1, &G->SUnits[N->getNodeId()], -1,
+ "color=blue,style=dashed");
+ } else {
+ // For a MachineInstr-based ScheduleDAG, find a root to point to.
+ for (unsigned i = 0, e = G->SUnits.size(); i != e; ++i) {
+ if (G->SUnits[i].Succs.empty()) {
+ GW.emitEdge(0, -1, &G->SUnits[i], -1,
+ "color=blue,style=dashed");
+ break;
+ }
+ }
+ }
}
};
}