diff options
| author | Dan Gohman <gohman@apple.com> | 2010-05-20 01:23:41 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-05-20 01:23:41 +0000 |
| commit | ee5673b622de7684c20b265f15a7563c573f452a (patch) | |
| tree | ef0a8c768d7c8ed8da5567e9dd5a8c3ad90db3ce /lib | |
| parent | 51f5d6af8c45bf145808ced9e867ac711acc9955 (diff) | |
Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104203 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 212958025b..0f782c9a8f 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1102,7 +1102,8 @@ def MOVNTI_64mr : RI<0xC3, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src), } // Load, store, and memory fence -def SFENCE : PSI<0xAE, MRM7r, (outs), (ins), "sfence", [(int_x86_sse_sfence)]>; +def SFENCE : I<0xAE, MRM_F8, (outs), (ins), "sfence", [(int_x86_sse_sfence)]>, + TB, Requires<[HasSSE1]>; // MXCSR register def LDMXCSR : PSI<0xAE, MRM2m, (outs), (ins i32mem:$src), |