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authorJim Grosbach <grosbach@apple.com>2011-08-23 20:53:08 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-23 20:53:08 +0000
commitd04f6a581ce06ef1cd5fe376088347ad0246e07d (patch)
treeb76613297f9edc752c461f13e42b64b40487a387 /lib
parent7ced7763cab4fc22b8198f39fbbb6b7264cd1628 (diff)
[SU]XT[BH] are only available on ARMv6 and up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/ARMFastISel.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 35d64064de..8f7447558c 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -2002,12 +2002,14 @@ bool ARMFastISel::SelectIntCast(const Instruction *I) {
switch (SrcVT.getSimpleVT().SimpleTy) {
default: return false;
case MVT::i16:
+ if (!Subtarget->hasV6Ops()) return false;
if (isZext)
Opc = isThumb ? ARM::t2UXTH : ARM::UXTH;
else
Opc = isThumb ? ARM::t2SXTH : ARM::SXTH;
break;
case MVT::i8:
+ if (!Subtarget->hasV6Ops()) return false;
if (isZext)
Opc = isThumb ? ARM::t2UXTB : ARM::UXTB;
else