diff options
author | Daniel Dunbar <daniel@zuster.org> | 2009-07-15 22:33:19 +0000 |
---|---|---|
committer | Daniel Dunbar <daniel@zuster.org> | 2009-07-15 22:33:19 +0000 |
commit | cfe9a605eea542d91e3db74289b69b7e317d90a6 (patch) | |
tree | e55f7a51ac5fbe3facefdbaf24028b5390d5a334 /lib | |
parent | 72fbc3d9d260e061bdee07059fcd63772c714091 (diff) |
Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/LLVMTargetMachine.cpp | 20 | ||||
-rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 24 | ||||
-rw-r--r-- | lib/Target/ARM/ARMTargetMachine.h | 9 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaTargetMachine.cpp | 21 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaTargetMachine.h | 9 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCTargetMachine.cpp | 24 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCTargetMachine.h | 12 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 22 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.h | 12 |
9 files changed, 42 insertions, 111 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index b9f4edc7a8..15eac944a0 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -99,7 +99,9 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM, MachineCodeEmitter *MCE, CodeGenOpt::Level OptLevel) { if (MCE) - addSimpleCodeEmitter(PM, OptLevel, PrintEmittedAsm, *MCE); + addSimpleCodeEmitter(PM, OptLevel, *MCE); + if (PrintEmittedAsm) + addAssemblyEmitter(PM, OptLevel, true, ferrs()); PM.add(createGCInfoDeleter()); @@ -116,7 +118,9 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM, JITCodeEmitter *JCE, CodeGenOpt::Level OptLevel) { if (JCE) - addSimpleCodeEmitter(PM, OptLevel, PrintEmittedAsm, *JCE); + addSimpleCodeEmitter(PM, OptLevel, *JCE); + if (PrintEmittedAsm) + addAssemblyEmitter(PM, OptLevel, true, ferrs()); PM.add(createGCInfoDeleter()); @@ -133,7 +137,9 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM, ObjectCodeEmitter *OCE, CodeGenOpt::Level OptLevel) { if (OCE) - addSimpleCodeEmitter(PM, OptLevel, PrintEmittedAsm, *OCE); + addSimpleCodeEmitter(PM, OptLevel, *OCE); + if (PrintEmittedAsm) + addAssemblyEmitter(PM, OptLevel, true, ferrs()); PM.add(createGCInfoDeleter()); @@ -159,7 +165,9 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, if (addPreEmitPass(PM, OptLevel) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - addCodeEmitter(PM, OptLevel, PrintEmittedAsm, MCE); + addCodeEmitter(PM, OptLevel, MCE); + if (PrintEmittedAsm) + addAssemblyEmitter(PM, OptLevel, true, ferrs()); PM.add(createGCInfoDeleter()); @@ -185,7 +193,9 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, if (addPreEmitPass(PM, OptLevel) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - addCodeEmitter(PM, OptLevel, PrintEmittedAsm, JCE); + addCodeEmitter(PM, OptLevel, JCE); + if (PrintEmittedAsm) + addAssemblyEmitter(PM, OptLevel, true, ferrs()); PM.add(createGCInfoDeleter()); diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 54df2a59e1..6bdc5f3aed 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -143,7 +143,6 @@ bool ARMBaseTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! if (DefRelocModel == Reloc::Default) @@ -151,15 +150,11 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, // Machine code emitter pass for ARM. PM.add(createARMCodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { // FIXME: Move this to TargetJITInfo! if (DefRelocModel == Reloc::Default) @@ -167,15 +162,11 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, // Machine code emitter pass for ARM. PM.add(createARMJITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { // FIXME: Move this to TargetJITInfo! if (DefRelocModel == Reloc::Default) @@ -183,45 +174,30 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, // Machine code emitter pass for ARM. PM.add(createARMObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { // Machine code emitter pass for ARM. PM.add(createARMCodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { // Machine code emitter pass for ARM. PM.add(createARMJITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { // Machine code emitter pass for ARM. PM.add(createARMObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index 0130a62ef8..b1287b6285 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -59,22 +59,19 @@ public: CodeGenOpt::Level OptLevel, bool Verbose, formatted_raw_ostream &Out); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); + MachineCodeEmitter &MCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &MCE); + JITCodeEmitter &MCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); + ObjectCodeEmitter &OCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &MCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); }; diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 9bf588f21b..3fd96fe4c7 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -73,44 +73,35 @@ bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, } bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { + MachineCodeEmitter &MCE) { PM.add(createAlphaCodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { + JITCodeEmitter &JCE) { PM.add(createAlphaJITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { + ObjectCodeEmitter &OCE) { PM.add(createAlphaObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { - return addCodeEmitter(PM, OptLevel, DumpAsm, MCE); + return addCodeEmitter(PM, OptLevel, MCE); } bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { - return addCodeEmitter(PM, OptLevel, DumpAsm, JCE); + return addCodeEmitter(PM, OptLevel, JCE); } bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { - return addCodeEmitter(PM, OptLevel, DumpAsm, OCE); + return addCodeEmitter(PM, OptLevel, OCE); } diff --git a/lib/Target/Alpha/AlphaTargetMachine.h b/lib/Target/Alpha/AlphaTargetMachine.h index d0f600c6ab..f2239909e3 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.h +++ b/lib/Target/Alpha/AlphaTargetMachine.h @@ -61,22 +61,19 @@ public: CodeGenOpt::Level OptLevel, bool Verbose, formatted_raw_ostream &Out); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); + MachineCodeEmitter &MCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); + JITCodeEmitter &JCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &JCE); + ObjectCodeEmitter &JCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); }; diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 1928d6ac26..bcb5d9c2ce 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -111,7 +111,7 @@ bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { + MachineCodeEmitter &MCE) { // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. // FIXME: This should be moved to TargetJITInfo!! if (Subtarget.isPPC64()) { @@ -132,15 +132,13 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, // Machine code emitter pass for PowerPC. PM.add(createPPCCodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { + JITCodeEmitter &JCE) { // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. // FIXME: This should be moved to TargetJITInfo!! if (Subtarget.isPPC64()) { @@ -161,15 +159,13 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, // Machine code emitter pass for PowerPC. PM.add(createPPCJITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { + ObjectCodeEmitter &OCE) { // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. // FIXME: This should be moved to TargetJITInfo!! if (Subtarget.isPPC64()) { @@ -190,45 +186,31 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, // Machine code emitter pass for PowerPC. PM.add(createPPCObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { // Machine code emitter pass for PowerPC. PM.add(createPPCCodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { // Machine code emitter pass for PowerPC. PM.add(createPPCJITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { // Machine code emitter pass for PowerPC. PM.add(createPPCObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h index e393bf49a6..ac4be0f602 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.h +++ b/lib/Target/PowerPC/PPCTargetMachine.h @@ -72,20 +72,20 @@ public: CodeGenOpt::Level OptLevel, bool Verbose, formatted_raw_ostream &Out); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); + MachineCodeEmitter &MCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); + JITCodeEmitter &JCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); + ObjectCodeEmitter &OCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); + MachineCodeEmitter &MCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); + JITCodeEmitter &JCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); + ObjectCodeEmitter &OCE); virtual bool getEnableTailMergeDefault() const; }; diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index f4c8b13490..bb765bd768 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -194,7 +194,6 @@ bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! // On Darwin, do not override 64-bit setting made in X86TargetMachine(). @@ -215,15 +214,12 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, } PM.add(createX86CodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { // FIXME: Move this to TargetJITInfo! // On Darwin, do not override 64-bit setting made in X86TargetMachine(). @@ -244,52 +240,34 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, } PM.add(createX86JITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); return false; } bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { PM.add(createX86ObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE) { PM.add(createX86CodeEmitterPass(*this, MCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE) { PM.add(createX86JITCodeEmitterPass(*this, JCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE) { PM.add(createX86ObjectCodeEmitterPass(*this, OCE)); - if (DumpAsm) - addAssemblyEmitter(PM, OptLevel, true, ferrs()); - return false; } diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index 5733770dc9..85abe0c377 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -68,20 +68,20 @@ public: CodeGenOpt::Level OptLevel, bool Verbose, formatted_raw_ostream &Out); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); + MachineCodeEmitter &MCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); + JITCodeEmitter &JCE); virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); + ObjectCodeEmitter &OCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); + MachineCodeEmitter &MCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); + JITCodeEmitter &JCE); virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); + ObjectCodeEmitter &OCE); }; /// X86_32TargetMachine - X86 32-bit target machine. |