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authorChris Lattner <sabre@nondot.org>2009-10-19 23:35:57 +0000
committerChris Lattner <sabre@nondot.org>2009-10-19 23:35:57 +0000
commitaf0df67d2bdae61d4360c79ff25deeb34d33f73a (patch)
treeaaeedd3d8d9d696730eb76ef90c1ead19ac39c02 /lib
parent306d14f9aa9fe6891f5df447fe9e0a380de02501 (diff)
X86 should ignore implicit regs when lowering to MCInst also,
no functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84567 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/AsmPrinter/X86MCInstLower.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
index 5ede37bd3a..d498c57f4c 100644
--- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
+++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
@@ -306,6 +306,8 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MI->dump();
llvm_unreachable("unknown operand type");
case MachineOperand::MO_Register:
+ // Ignore all implicit register operands.
+ if (MO.isImplicit()) continue;
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate: