[fast-isel] Add support for SUBs with non-legal types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150047 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 5 insertions, 0 deletions

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index faa3e5920e..39b3bd4bde 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -1749,6 +1749,9 @@ bool ARMFastISel::SelectBinaryIntOp(const Instruction *I, unsigned ISDOpcode) {
     case ISD::OR:
       Opc = isThumb2 ? ARM::t2ORRrr : ARM::ORRrr;
       break;
+    case ISD::SUB:
+      Opc = isThumb2 ? ARM::t2SUBrr : ARM::SUBrr;
+      break;
   }
 
   unsigned SrcReg1 = getRegForValue(I->getOperand(0));
@@ -2509,6 +2512,8 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
       return SelectBinaryIntOp(I, ISD::ADD);
     case Instruction::Or:
       return SelectBinaryIntOp(I, ISD::OR);
+    case Instruction::Sub:
+      return SelectBinaryIntOp(I, ISD::SUB);
     case Instruction::FAdd:
       return SelectBinaryFPOp(I, ISD::FADD);
     case Instruction::FSub: