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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-09-21 21:22:11 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-09-21 21:22:11 +0000
commit65cbfa0f370f70bb5bd57c084fd73dde6fa35cee (patch)
treebb696eff028a3c8a1488c82e2a7967bb45a46549 /lib
parent540c82a7003c09f62cb863a32e8ad49bed18316e (diff)
The real x87 floating point registers should not be allocatable. They
are only used by the stackifier when transforming FPn register allocations to the real stack file x87 registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16472 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86RegisterInfo.td12
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td
index 4262a9ffd7..628a239d01 100644
--- a/lib/Target/X86/X86RegisterInfo.td
+++ b/lib/Target/X86/X86RegisterInfo.td
@@ -86,5 +86,13 @@ def R32 : RegisterClass<i32, 32, [EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP]> {
def RFP : RegisterClass<f80, 32, [FP0, FP1, FP2, FP3, FP4, FP5, FP6]>;
-// Floating point stack registers.
-def RST : RegisterClass<f80, 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]>;
+// Floating point stack registers (these are not allocatable by the
+// register allocator - the floating point stackifier is responsible
+// for transforming FPn allocations to STn registers)
+def RST : RegisterClass<f80, 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]> {
+ let Methods = [{
+ iterator allocation_order_end(MachineFunction &MF) const {
+ return begin();
+ }
+ }];
+}