diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-02 18:35:30 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-02 18:35:30 +0000 |
commit | 5d20c3152bd7fe91eda1b58a5eb6da7067874c61 (patch) | |
tree | 62127fa203675b31b52e7c929380dcf5b9b88239 /lib | |
parent | 6f888a80d59f2eb4532dd9940de62c72899cb6fa (diff) |
Use RegisterClassInfo::getOrder in RAFast.
This saves two virtual function calls and an Allocatable BitVector test,
making RAFast run 2% faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/RegAllocFast.cpp | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/lib/CodeGen/RegAllocFast.cpp b/lib/CodeGen/RegAllocFast.cpp index b2fd6e092c..58739ff31d 100644 --- a/lib/CodeGen/RegAllocFast.cpp +++ b/lib/CodeGen/RegAllocFast.cpp @@ -13,6 +13,7 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "regalloc" +#include "RegisterClassInfo.h" #include "llvm/BasicBlock.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" @@ -58,6 +59,7 @@ namespace { MachineRegisterInfo *MRI; const TargetRegisterInfo *TRI; const TargetInstrInfo *TII; + RegisterClassInfo RegClassInfo; // Basic block currently being allocated. MachineBasicBlock *MBB; @@ -499,14 +501,12 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) { } } - TargetRegisterClass::iterator AOB = RC->allocation_order_begin(*MF); - TargetRegisterClass::iterator AOE = RC->allocation_order_end(*MF); + ArrayRef<unsigned> AO = RegClassInfo.getOrder(RC); // First try to find a completely free register. - for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) { + for (ArrayRef<unsigned>::iterator I = AO.begin(), E = AO.end(); I != E; ++I) { unsigned PhysReg = *I; - if (PhysRegState[PhysReg] == regFree && !UsedInInstr.test(PhysReg) && - Allocatable.test(PhysReg)) + if (PhysRegState[PhysReg] == regFree && !UsedInInstr.test(PhysReg)) return assignVirtToPhysReg(LRE, PhysReg); } @@ -514,11 +514,7 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) { << RC->getName() << "\n"); unsigned BestReg = 0, BestCost = spillImpossible; - for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) { - if (!Allocatable.test(*I)) { - DEBUG(dbgs() << "\tRegister " << *I << " is not allocatable.\n"); - continue; - } + for (ArrayRef<unsigned>::iterator I = AO.begin(), E = AO.end(); I != E; ++I) { unsigned Cost = calcSpillCost(*I); DEBUG(dbgs() << "\tRegister: " << *I << "\n"); DEBUG(dbgs() << "\tCost: " << Cost << "\n"); @@ -1048,6 +1044,7 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) { TM = &Fn.getTarget(); TRI = TM->getRegisterInfo(); TII = TM->getInstrInfo(); + RegClassInfo.runOnMachineFunction(Fn); UsedInInstr.resize(TRI->getNumRegs()); Allocatable = TRI->getAllocatableSet(*MF); |